From f93882570496aa02ba8a47bfaf81cce43046b978 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 28 Mar 2012 18:01:09 +0900 Subject: [PATCH] mmc: sh_mmcif: double clock speed Correct an off-by one error when calculating the clock divisor in cases where the host clock is a power of two of the target clock. Previously the divisor was one greater than the correct value in these cases leading to the clock being set at half the desired speed. Thanks to Guennadi Liakhovetski for working with me on the logic for this change. Tested-by: Cao Minh Hiep Acked-by: Guennadi Liakhovetski Signed-off-by: Simon Horman Signed-off-by: Chris Ball --- drivers/mmc/host/sh_mmcif.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c index aafaf0b6eb1c..d79c6430c164 100644 --- a/drivers/mmc/host/sh_mmcif.c +++ b/drivers/mmc/host/sh_mmcif.c @@ -454,7 +454,8 @@ static void sh_mmcif_clock_control(struct sh_mmcif_host *host, unsigned int clk) sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_SUP_PCLK); else sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_CLEAR & - ((fls(host->clk / clk) - 1) << 16)); + ((fls(DIV_ROUND_UP(host->clk, + clk) - 1) - 1) << 16)); sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_ENABLE); } -- 2.39.5