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ARM: zynq: Extend kernel image size to 60MB
2014-05-14 Michal SimekARM: zynq: Extend kernel image size to 60MB
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-14 Michal SimekARM: zynq: Fix building SPL without FPGA support
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-14 Mike LooijmansARM: zynq: Fix bootmode mask
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-14 Michal SimekARM: zynq: Setup correct slcr_lock value
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-14 Michal SimekARM: zynq: slcr: Fix incorrect commentary
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-14 Michal SimekARM: zynq: Call zynq board_init() in SPL
Signed-off-by: Michal Simek <monstr@monstr.eu>
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2014-05-14 Michal SimekARM: zynq: Do not use half memory size for ECC case
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-14 Siva Durga Prasad... ARM: zynq: Added efuse status register base address
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-14 Michal SimekARM: zynq: Remove sparse warnings
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-14 Michal SimekARM: zynq: Fix sparse warning in ddrc.c
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-14 Michal SimekARM: zynq: Fix sparse warnings in slcr.c
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-13 Siva Durga Prasad... fpga: zynq: Use helper function zynq_validate_bitstream
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-13 Siva Durga Prasad... fpga: zynq: Use helper functions for zynq dma
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-13 Michal Simekfpga: zynq: Remove sparse warnings
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-13 Michal Simekfpga: xilinx: Simplify load/dump/info function handling
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-13 Michal Simekfpga: xilinx: Fix the rest of CamelCases
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-13 Michal Simekfpga: xilinx: Avoid CamelCase for in Xilinx_desc
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-13 Michal Simekfpga: virtex2: Avoid CamelCase
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-13 Michal Simekfpga: spartan3: Avoid CamelCase
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-13 Michal Simekfpga: spartan2: Avoid CamelCase
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-06 Michal Simekserial: zynq: Fix typo in suffix function name
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-06 Michal Simekserial: zynq: Remove sparse warnings
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-06 Michal Simeknet: zynq: Fix sparse warnings in gem
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-06 Michal Simeknet: zynq: Use predefined macros instead of hardcoded...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-05-06 Stephan Linzmicroblaze: Wire up OF support for emaclite
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-19 Siva Durga Prasad... arm: zynq: correct the argument to lldiv
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-19 Michal Simekzynq: Add support for U-BOOT SPL
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-19 Michal Simekzynq: Update CLK in bdinfo
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-19 Soren Brinkmannzynq: Implement dump clock command
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-19 Soren Brinkmannserial_zynq: Migrate to Zynq clock framework
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-19 Soren Brinkmannnet: zynq_gem: Calculate clock dividers dynamically
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-19 Soren Brinkmannnet: zynq_gem: Move RCLK details out of driver
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-19 Michal Simekzynq: timer: Fix hangs if network activity attempted...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-19 Soren Brinkmannzynq: timer: Migrate to zynq clock framework
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-19 Soren Brinkmannzynq: Provide a framework to read clock frequencies
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-19 Soren Brinkmanncommon: Provide DIV_ROUND_CLOSEST macro
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-19 Michal Simekzynq: serial: Simplify serial driver initialization
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-19 Michal Simekzynq: Move bootmode to headers
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-19 Michal Simekzynq: Use board_eth_init if CMD_NET is not enabled
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-19 Michal Simekzynq: Enable tftp put command
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-19 Michal Simekzynq: Extend kernel image size to 20MB
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-19 Michal Simekzynq: Fix incorrect header name
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-19 Michal Simekzynq: Enable dcache support
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-19 Michal Simekzynq: Do not explicitely enable icache
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-06 Michal Simekfpga: zynqpl: Add support for zc7015 device
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-06 Novasys Ingenieriefpga: zynq: Correct fpga load when buf is not aligned
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-04 Michal Simekserial: uartlite: Reset RX/TX in init
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-04 Michal Simeknet: axi_emac: Check if phy was correctly detected
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-04 Michal Simekmicroblaze: Add SPL support
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-04 Michal Simekmicroblaze: Enable buffer write for NOR flashes
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-04 Michal Simekmicroblaze: Report priviledged or stack protection...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-04 Michal Simekmicroblaze: Show u-boot banner
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-02-04 Michal Simekcommon: Add new clk command
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2014-01-21 Michal Simeknet: gem: Check if phy was correctly detected
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-12-02 Soren Brinkmannserial: zynq: Remove unused #defines
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-11-06 Radhey Shyam Pandeyarm: zynq : Revert TZ_DDR_RAM to secure.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-11-06 Michal Simekarm: zynq: Do not remap OCM to high address
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-11-06 Michal Simekfpga: Add support for gzip images with bitstreams
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-11-06 Michal Simekfpga: zynqpl: Do not place bitstream below 1MB
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-11-06 Jagannadha Sutradhar... fpga: zynqpl: Add dcache flush support
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-08-13 Jagannadha Sutradhar... serial: arm_dcc: Register with serial core
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-08-13 Jagannadha Sutradhar... serial: arm_dcc: Remove stdio structure support
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-08-12 Michal Simekzynq: Enable axi ethernet and emaclite driver initialization
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-08-12 Michal Simekzynq: slcr: Wait 100ms till clk is properly setup
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-08-12 Michal Simekzynq: Add new ddrc driver for ECC support
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-08-12 Soren Brinkmannfpga: zynqpl: Clear loopback mode during device init
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-08-12 Michal Simekfpga: zynqpl: Add support for zc7100 device.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-05-09 Michal Simekgpio: Add support for microblaze xilinx GPIO
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-05-09 Michal Simekmicroblaze: bootm: Add support for loading initrd
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-05-09 Michal Simekmicroblaze: bootm: Fix coding style issues
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-05-06 Michal Simekfpga: Remove all CONFIG_SYS_* fpga related options
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-05-06 Michal Simekfpga: Check device name against bitstream name
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-05-06 Michal Simekfpga: zynq: Add support for loading bitstream
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-05-06 Michal Simekcmd: fpga: Do not include net.h
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-05-06 Michal Simekfpga: Change the first parameter in fpga_loadbitstream
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-05-06 Michal Simekcmd: fpga: Move fpga_loadbitstream to fpga.c
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-05-06 Michal Simekcmd: fpga: Clean coding style
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-05-06 Michal Simekfpga: Fix debug message compilation error
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-05-06 Michal Simekfpga: Clean coding style
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-04-30 Michal Simeki2c: zynq: Add support for Xilinx Zynq
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-04-30 Michal Simekmmc: Add support for Xilinx Zynq sdhci controller
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-04-30 Michal Simeknet: gem: Add support for phy autodetection
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-04-30 David Andreynet: gem: Preserve clk on emio interface
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-04-30 David Andreynet: gem: Pass phy address to init
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-04-30 Michal Simekzynq: Move macros to hardware.h
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-04-30 Michal Simeknet: gem: Fix gem driver on 1Gbps LAN
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-04-30 Michal Simeknet: gem: Do not initialize BDs again
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-04-30 Michal Simeknet: gem: Simplify return path in zynq_gem_recv
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-04-30 Michal Simeknet: gem: Remove WRAP bit from TX buffer description
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-04-30 Michal Simeknet: phy: Define Marvell 88e1518 phy
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-04-30 Michal Simekzynq: Move scutimer baseaddr to hardware.h
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-04-30 Michal Simekarm: zynq: Rename XPSS_ prefix to ZYNQ_ for hardcoded...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-04-30 David Andreyarm: zynq: U-Boot udelay < 1000 FIX
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-04-30 Michal Simekwatchdog: Add support for Xilinx Microblaze watchdog
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-04-30 Michal Simekmicroblaze: Disable all cpu features before reset
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-04-30 Michal Simekmicroblaze: Enable netconsole
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-04-30 Michal Simekmicroblaze: Fix reset function
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-02-07 Michal Simekarm: zynq: Add lowlevel initialization to C
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-02-07 Michal Simekarm: zynq: Add SLCR support with system reset
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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2013-02-07 Michal Simekxilinx: zynq: Enable DCC and create new zynq_dcc board
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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UBoot for KaRo TX COM modules