2014-04-18 |
Chew, Chiau Ee | spi/pxa2xx-pci: Add PCI mode support for BayTrail LPSS SPI Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
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2014-03-26 |
Chew, Chiau Ee | dma: dw: Add suspend and resume handling for PCI mode... Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
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2014-03-12 |
Chew, Chiau Ee | i2c: designware-pci: set ideal HCNT, LCNT and SDA hold... Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
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2014-03-10 |
Chew, Chiau Ee | i2c: designware-pci: add 10-bit addressing mode functionalit... Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
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2014-02-19 |
Chew, Chiau Ee | ACPI / LPSS: Add Intel BayTrail ACPI mode PWM Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
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2013-11-28 |
Chew, Chiau Ee | spi/pxa2xx: Restore private register bits. Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
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2013-09-27 |
Chew, Chiau Ee | i2c: designware: 10-bit addressing mode enabling if... Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
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2013-08-07 |
Chew, Chiau Ee | i2c: designware: Manually set RESTART bit between messages Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
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2013-05-17 |
Chew, Chiau Ee | ALSA: hda - add PCI IDs for Intel BayTrail Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
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2013-05-16 |
Chew, Chiau Ee | ata_piix: add PCI IDs for Intel BayTail Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
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