projects / karo-tx-uboot.git / search
| 2015-01-21 | Michal Simek | fpga: Remove extern prototypes from .h Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2015-01-21 | Michal Simek | fpga: Protect GZIP usage when LOADMK is enabled Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-11-11 | Peter Crosthwaite | kconfig: zynq: Add ZYBO board Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-11-11 | Tinghui Wang | configs: zynq: Add config support for ZYBO Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-11-11 | Peter Crosthwaite | arm: dts: zynq: Add digilent ZYBO board dts Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-11-11 | Soren Brinkmann | zynq: Use GPLed files for SPL Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-09-10 | Masahiro Yamada | microblaze: remove #ident directive to fix build error Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-09-09 | Vasili Galka | microblaze: Fix printf size_t format related warnings... Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-08-19 | Michal Simek | ARM: zynq: Remove spl.h Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-08-19 | Michal Simek | ARM: zynq: Move ps7_init() out of spl.h Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-08-08 | Peter Crosthwaite | zynq: spl: Add vectors section to linker script Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-07-23 | Masahiro Yamada | zynq: disable -Wstrict-prototypes option for ps7_init.c Cc: Michal Simek <michal.simek@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-07-23 | Michal Simek | ARM: zynq: Show ECC status on the same line as DRAM... Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-07-23 | Michal Simek | ARM: zynq: Enable generic board for Xilinx Zynq Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-06-17 | Masahiro Yamada | arm: zynq: fix a bug in Zynq linker script Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-20 | Siva Durga Prasad... | fpga: Added support to load bit stream from SD/MMC Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-20 | Michal Simek | zynq: Enable fpga loadp and loadbp commands Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-20 | Michal Simek | fpga: zynqpl: Clean partial bitstream handling Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-20 | Michal Simek | fpga: Add support to load partial bitstreams Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-20 | Michal Simek | fpga: Define bitstream type based on command selection Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-20 | Siva Durga Prasad... | fpga: Guard the LOADMK functionality with CMD_FPGA_LOADMK Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-20 | Michal Simek | configs: iocom: Fix typo on CMD_FPGA command Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-15 | Masahiro Yamada | zynq: add UART nodes to device tree to initialize UART... Cc: Michal Simek <michal.simek@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> [on ZC702 board] Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-15 | Masahiro Yamada | zynq: add memory nodes to device tree to initialize... Cc: Michal Simek <michal.simek@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> [on ZC702 board] Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-15 | Masahiro Yamada | zynq: import zynq-7000.dtsi from Linux Kernel Suggested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-15 | Masahiro Yamada | zynq: load u-boot-dtb.img if CONFIG_OF_SEPARATE is... Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-15 | Masahiro Yamada | build: support a new image u-boot-dtb.img Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-14 | Masahiro Yamada | zynq: treat ps7_init.c/h as external files to ignore... Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-14 | Masahiro Yamada | zynq: add empty xil_io.h to avoid compile error Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-14 | Michal Simek | ARM: zynq: Extend maximum number of command arguments Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-14 | Siva Durga Prasad... | ARM: zynq: Enable EXT4 configs Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-14 | Siva Durga Prasad... | ARM: zynq: Move USB/SD/MMC common FAT configs Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-14 | Siva Durga Prasad... | ARM: zynq: Enable the FAT write capability Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-14 | Siva Durga Prasad... | ARM: zynq: Added USB host support for zynq boards Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-14 | Michal Simek | ARM: zynq: ehci: Added USB host driver support Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-14 | Michal Simek | ARM: zynq: Add MIO detection code Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-14 | Michal Simek | ARM: zynq: Extend kernel image size to 60MB Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-14 | Michal Simek | ARM: zynq: Fix building SPL without FPGA support Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-14 | Mike Looijmans | ARM: zynq: Fix bootmode mask Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-14 | Michal Simek | ARM: zynq: Setup correct slcr_lock value Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-14 | Michal Simek | ARM: zynq: slcr: Fix incorrect commentary Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-14 | Michal Simek | ARM: zynq: Call zynq board_init() in SPL |
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| 2014-05-14 | Michal Simek | ARM: zynq: Do not use half memory size for ECC case Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-14 | Siva Durga Prasad... | ARM: zynq: Added efuse status register base address Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-14 | Michal Simek | ARM: zynq: Remove sparse warnings Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-14 | Michal Simek | ARM: zynq: Fix sparse warning in ddrc.c Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-14 | Michal Simek | ARM: zynq: Fix sparse warnings in slcr.c Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-13 | Siva Durga Prasad... | fpga: zynq: Use helper function zynq_validate_bitstream Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-13 | Siva Durga Prasad... | fpga: zynq: Use helper functions for zynq dma Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-13 | Michal Simek | fpga: zynq: Remove sparse warnings Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-13 | Michal Simek | fpga: xilinx: Simplify load/dump/info function handling Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-13 | Michal Simek | fpga: xilinx: Fix the rest of CamelCases Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-13 | Michal Simek | fpga: xilinx: Avoid CamelCase for in Xilinx_desc Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-13 | Michal Simek | fpga: virtex2: Avoid CamelCase Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-13 | Michal Simek | fpga: spartan3: Avoid CamelCase Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-13 | Michal Simek | fpga: spartan2: Avoid CamelCase Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-06 | Michal Simek | serial: zynq: Fix typo in suffix function name Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-06 | Michal Simek | serial: zynq: Remove sparse warnings Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-06 | Michal Simek | net: zynq: Fix sparse warnings in gem Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-06 | Michal Simek | net: zynq: Use predefined macros instead of hardcoded... Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-05-06 | Stephan Linz | microblaze: Wire up OF support for emaclite Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-19 | Siva Durga Prasad... | arm: zynq: correct the argument to lldiv Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-19 | Michal Simek | zynq: Add support for U-BOOT SPL Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-19 | Michal Simek | zynq: Update CLK in bdinfo Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-19 | Soren Brinkmann | zynq: Implement dump clock command Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-19 | Soren Brinkmann | serial_zynq: Migrate to Zynq clock framework Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-19 | Soren Brinkmann | net: zynq_gem: Calculate clock dividers dynamically Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-19 | Soren Brinkmann | net: zynq_gem: Move RCLK details out of driver Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-19 | Michal Simek | zynq: timer: Fix hangs if network activity attempted... Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-19 | Soren Brinkmann | zynq: timer: Migrate to zynq clock framework Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-19 | Soren Brinkmann | zynq: Provide a framework to read clock frequencies Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-19 | Soren Brinkmann | common: Provide DIV_ROUND_CLOSEST macro Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-19 | Michal Simek | zynq: serial: Simplify serial driver initialization Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-19 | Michal Simek | zynq: Move bootmode to headers Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-19 | Michal Simek | zynq: Use board_eth_init if CMD_NET is not enabled Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-19 | Michal Simek | zynq: Enable tftp put command Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-19 | Michal Simek | zynq: Extend kernel image size to 20MB Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-19 | Michal Simek | zynq: Fix incorrect header name Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-19 | Michal Simek | zynq: Enable dcache support Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-19 | Michal Simek | zynq: Do not explicitely enable icache Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-06 | Michal Simek | fpga: zynqpl: Add support for zc7015 device Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-06 | Novasys Ingenierie | fpga: zynq: Correct fpga load when buf is not aligned Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-04 | Michal Simek | serial: uartlite: Reset RX/TX in init Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-04 | Michal Simek | net: axi_emac: Check if phy was correctly detected Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-04 | Michal Simek | microblaze: Add SPL support Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-04 | Michal Simek | microblaze: Enable buffer write for NOR flashes Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-04 | Michal Simek | microblaze: Report priviledged or stack protection... Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-04 | Michal Simek | microblaze: Show u-boot banner Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-02-04 | Michal Simek | common: Add new clk command Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2014-01-21 | Michal Simek | net: gem: Check if phy was correctly detected Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2013-12-02 | Soren Brinkmann | serial: zynq: Remove unused #defines Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2013-11-06 | Radhey Shyam Pandey | arm: zynq : Revert TZ_DDR_RAM to secure. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2013-11-06 | Michal Simek | arm: zynq: Do not remap OCM to high address Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2013-11-06 | Michal Simek | fpga: Add support for gzip images with bitstreams Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2013-11-06 | Michal Simek | fpga: zynqpl: Do not place bitstream below 1MB Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2013-11-06 | Jagannadha Sutradhar... | fpga: zynqpl: Add dcache flush support Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2013-08-13 | Jagannadha Sutradhar... | serial: arm_dcc: Register with serial core Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2013-08-13 | Jagannadha Sutradhar... | serial: arm_dcc: Remove stdio structure support Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2013-08-12 | Michal Simek | zynq: Enable axi ethernet and emaclite driver initialization Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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| 2013-08-12 | Michal Simek | zynq: slcr: Wait 100ms till clk is properly setup Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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