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KVM: SVM: copy instruction bytes from VMCB
2011-01-12 Andre PrzywaraKVM: SVM: copy instruction bytes from VMCB
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2011-01-12 Andre PrzywaraKVM: SVM: implement enhanced INVLPG intercept
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2011-01-12 Andre PrzywaraKVM: SVM: enhance mov DR intercept handler
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2011-01-12 Andre PrzywaraKVM: SVM: enhance MOV CR intercept handler
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2011-01-12 Andre PrzywaraKVM: SVM: add new SVM feature bit names
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2011-01-12 Andre PrzywaraKVM: cleanup emulate_instruction
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2011-01-12 Andre PrzywaraKVM: move complete_insn_gp() into x86.c
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2011-01-12 Andre PrzywaraKVM: x86: fix CR8 handling
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2010-12-08 Andre PrzywaraKVM: enlarge number of possible CPUID leaves
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2010-09-08 Andre Przywarax86, kvm: add new AMD SVM feature bits
Signed-off-by: Andre Przywara <andre.przywara@amd,com>
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2010-09-08 Andre Przywarax86, cpu: Fix allowed CPUID bits for KVM guests
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2010-09-08 Andre Przywarax86, cpu: Update AMD CPUID feature bits
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2010-09-08 Andre Przywarax86, cpu: Fix renamed, not-yet-shipping AMD CPUID feature bit
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2010-05-17 Andre PrzywaraKVM: SVM: implement NEXTRIPsave SVM feature
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2010-04-20 Andre PrzywaraKVM: allow bit 10 to be cleared in MSR_IA32_MC4_CTL
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2009-09-10 Andre PrzywaraKVM: add module parameters documentation
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2009-09-10 Andre PrzywaraKVM: fix MMIO_CONF_BASE MSR access
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2009-09-10 Andre PrzywaraKVM: handle AMD microcode MSR
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2009-09-10 Andre PrzywaraKVM: Ignore PCI ECS I/O enablement
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2009-09-10 Andre PrzywaraKVM: introduce module parameter for ignoring unknown...
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2009-09-10 Andre PrzywaraKVM: ignore reads from AMDs C1E enabled MSR
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2009-09-10 Andre PrzywaraKVM: ignore AMDs HWCR register access to set the FFDIS bit
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2009-09-10 Andre PrzywaraKVM: x86 emulator: Add sysexit emulation
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2009-09-10 Andre PrzywaraKVM: x86 emulator: Add sysenter emulation
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2009-09-10 Andre PrzywaraKVM: x86 emulator: add syscall emulation
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2009-09-10 Andre PrzywaraKVM: x86 emulator: Prepare for emulation of syscall...
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2009-09-10 Andre PrzywaraKVM: x86 emulator: Add missing EFLAGS bit definitions
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2009-09-10 Andre PrzywaraKVM: Allow emulation of syscalls instructions on #UD
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2009-09-10 Andre PrzywaraKVM: Move performance counter MSR access interception...
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2009-09-10 Andre PrzywaraKVM: SVM: use explicit 64bit storage for sysenter values
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2009-06-11 Andre Przywara8250_pci: add the OXCB950 chip to the 8250 PCI driver.
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2009-06-10 Andre PrzywaraKVM: SVM: Fix cross vendor migration issue in segment...
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2009-05-11 Andre PrzywaraKVM: SVM: Fix cross vendor migration issue with unusable bit
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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2009-03-24 Andre PrzywaraKVM: SVM: set accessed bit for VMCB segment selectors
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
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Linux for Marvell Sheeva based platforms