]> git.karo-electronics.de Git - karo-tx-linux.git/blobdiff - arch/arm/boot/dts/imx53.dtsi
ARM: dts: imx53: Add sata support
[karo-tx-linux.git] / arch / arm / boot / dts / imx53.dtsi
index 569aa9f2c4eddb90736b47ea20c8a705b31e295b..9776903d096ba50cee254fc08b601dbb0c676a76 100644 (file)
 
 / {
        aliases {
-               serial0 = &uart1;
-               serial1 = &uart2;
-               serial2 = &uart3;
-               serial3 = &uart4;
-               serial4 = &uart5;
                gpio0 = &gpio1;
                gpio1 = &gpio2;
                gpio2 = &gpio3;
                i2c0 = &i2c1;
                i2c1 = &i2c2;
                i2c2 = &i2c3;
+               serial0 = &uart1;
+               serial1 = &uart2;
+               serial2 = &uart3;
+               serial3 = &uart4;
+               serial4 = &uart5;
+               spi0 = &ecspi1;
+               spi1 = &ecspi2;
+               spi2 = &cspi;
+       };
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a8";
+                       reg = <0x0>;
+               };
        };
 
        tzic: tz-interrupt-controller@0fffc000 {
                interrupt-parent = <&tzic>;
                ranges;
 
+               sata: sata@10000000 {
+                       compatible = "fsl,imx53-ahci";
+                       reg = <0x10000000 0x00004000>;
+                       clocks = <&clks 173>;
+                       interrupts = <28>;
+                       status = "disabled";
+               };
+
                ipu: ipu@18000000 {
                        #crtc-cells = <1>;
                        compatible = "fsl,imx53-ipu";
                                        reg = <0x50014000 0x4000>;
                                        interrupts = <30>;
                                        clocks = <&clks 49>;
+                                       dmas = <&sdma 24 1 0>,
+                                              <&sdma 25 1 0>;
+                                       dma-names = "rx", "tx";
                                        fsl,fifo-depth = <15>;
                                        fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */
                                        status = "disabled";
                                #interrupt-cells = <2>;
                        };
 
+                       kpp: kpp@53f94000 {
+                               compatible = "fsl,imx53-kpp", "fsl,imx21-kpp";
+                               reg = <0x53f94000 0x4000>;
+                               interrupts = <60>;
+                               clocks = <&clks 0>;
+                               status = "disabled";
+                       };
+
                        wdog1: wdog@53f98000 {
                                compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
                                reg = <0x53f98000 0x4000>;
                                                        MX53_PAD_GPIO_5__I2C3_SCL 0xc0000000
                                                >;
                                        };
+
+                                       pinctrl_i2c3_2: i2c3grp-2 {
+                                               fsl,pins = <
+                                                       MX53_PAD_GPIO_3__I2C3_SCL       0xc0000000
+                                                       MX53_PAD_GPIO_6__I2C3_SDA       0xc0000000
+                                               >;
+                                       };
                                };
 
                                ipu_disp0 {
                        reg = <0x60000000 0x10000000>;
                        ranges;
 
+                       iim: iim@63f98000 {
+                               compatible = "fsl,imx53-iim", "fsl,imx27-iim";
+                               reg = <0x63f98000 0x4000>;
+                               interrupts = <69>;
+                               clocks = <&clks 107>;
+                       };
+
                        uart5: serial@63f90000 {
                                compatible = "fsl,imx53-uart", "fsl,imx21-uart";
                                reg = <0x63f90000 0x4000>;
                                interrupts = <6>;
                                clocks = <&clks 56>, <&clks 56>;
                                clock-names = "ipg", "ahb";
+                               #dma-cells = <3>;
                                fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
                        };
 
                                reg = <0x63fcc000 0x4000>;
                                interrupts = <29>;
                                clocks = <&clks 48>;
+                               dmas = <&sdma 28 0 0>,
+                                      <&sdma 29 0 0>;
+                               dma-names = "rx", "tx";
                                fsl,fifo-depth = <15>;
                                fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */
                                status = "disabled";
                                reg = <0x63fe8000 0x4000>;
                                interrupts = <96>;
                                clocks = <&clks 50>;
+                               dmas = <&sdma 46 0 0>,
+                                      <&sdma 47 0 0>;
+                               dma-names = "rx", "tx";
                                fsl,fifo-depth = <15>;
                                fsl,ssi-dma-events = <47 46 45 44>; /* TX0 RX0 TX1 RX1 */
                                status = "disabled";
                                crtcs = <&ipu 1>;
                                status = "disabled";
                        };
+
+                       vpu: vpu@63ff4000 {
+                               compatible = "fsl,imx53-vpu";
+                               reg = <0x63ff4000 0x1000>;
+                               interrupts = <9>;
+                               clocks = <&clks 63>, <&clks 63>;
+                               clock-names = "per", "ahb";
+                               iram = <&ocram>;
+                               status = "disabled";
+                       };
+               };
+
+               ocram: sram@f8000000 {
+                       compatible = "mmio-sram";
+                       reg = <0xf8000000 0x20000>;
+                       clocks = <&clks 186>;
                };
        };
 };