karo: tx53: change drive strength of DDR control lines With the current setting of the DSE values for the DDR control lines we were exoeriencing memory errors at high operating temperatures. Extensive memory tests have shown, that increasing the value for the DSE setting fixes this problem.
karo: tx53: fix DDR_SEL value The current value is inappropriate for DDR3. When adding support for the HW rev. 3 of the TX53 module that has DDR3 instead of DDR2 memory, the values for both memory type were erroneously swapped, so that after removing DDR2 support lateron, the wrong value was kept.
karo: tx51: setup SDRAM & NAND control pads from DCD - Explicitly program the padctl settings for SDRAM and NAND from the DCD to ensure correct settings after soft reset. - Reduce DSE values for SDRAM and NAND control lines for better error margins in NAND detection and SDRAM stress test. - Revert the change of the NFC clock frequency from the previous release, as this is not necessary any more with the improved pad settings.