#define NFC_BUFSIZE 0
enum nfc_internal_buf {
- RAM_BUF_0,
- RAM_BUF_1,
- RAM_BUF_2,
- RAM_BUF_3,
- RAM_BUF_4,
- RAM_BUF_5,
- RAM_BUF_6,
- RAM_BUF_7,
+ RAM_BUF_0,
+ RAM_BUF_1,
+ RAM_BUF_2,
+ RAM_BUF_3,
+ RAM_BUF_4,
+ RAM_BUF_5,
+ RAM_BUF_6,
+ RAM_BUF_7,
};
enum nfc_output_mode {
- FDO_PAGE_SPARE = 0x0008,
- FDO_SPARE_ONLY = 0x1008, // LSB has to be 0x08
- FDO_FLASH_ID = 0x0010,
- FDO_FLASH_STATUS = 0x0020,
+ FDO_PAGE_SPARE = 0x0008,
+ FDO_SPARE_ONLY = 0x1008, // LSB has to be 0x08
+ FDO_FLASH_ID = 0x0010,
+ FDO_FLASH_STATUS = 0x0020,
};
#define wait_for_auto_prog_done()
+#define nfc_reg_read(a) readl(a)
+#define nfc_reg_write(v,a) writel(v,a)
// Polls the NANDFC to wait for an operation to complete
-#define wait_op_done() CYG_MACRO_START \
- volatile int mxc_nfc_wait_loop; \
- while (!(readw(NAND_FLASH_CONFIG2_REG) & NAND_FLASH_CONFIG2_INT_DONE)) { \
- for (mxc_nfc_wait_loop = 0; mxc_nfc_wait_loop < 100; mxc_nfc_wait_loop++); \
- } \
+#define wait_op_done() CYG_MACRO_START \
+ volatile int mxc_nfc_wait_loop; \
+ while (!(readw(NAND_FLASH_CONFIG2_REG) & NAND_FLASH_CONFIG2_INT_DONE)) { \
+ for (mxc_nfc_wait_loop = 0; mxc_nfc_wait_loop < 100; mxc_nfc_wait_loop++); \
+ } \
CYG_MACRO_END
/*!
* @param ecc_en 1 - ecc enabled; 0 - ecc disabled
*/
static void NFC_DATA_OUTPUT(enum nfc_internal_buf buf_no, enum nfc_output_mode mode,
- int ecc_en)
+ int ecc_en)
{
- u16 config1 = (ecc_en != 0) ? NAND_FLASH_CONFIG1_ECC_EN : 0;
+ u16 config1 = (ecc_en != 0) ? NAND_FLASH_CONFIG1_ECC_EN : 0;
- config1 |= readw(NAND_FLASH_CONFIG1_REG);
+ config1 |= readw(NAND_FLASH_CONFIG1_REG);
- if (mode == FDO_SPARE_ONLY) {
- config1 |= NAND_FLASH_CONFIG1_SP_EN;
- }
+ if (mode == FDO_SPARE_ONLY) {
+ config1 |= NAND_FLASH_CONFIG1_SP_EN;
+ }
- writew(config1, NAND_FLASH_CONFIG1_REG);
- writew(buf_no, RAM_BUFFER_ADDRESS_REG);
- writew(mode & 0xFF, NAND_FLASH_CONFIG2_REG);
- wait_op_done();
+ writew(config1, NAND_FLASH_CONFIG1_REG);
+ writew(buf_no, RAM_BUFFER_ADDRESS_REG);
+ writew(mode & 0xFF, NAND_FLASH_CONFIG2_REG);
+ wait_op_done();
}
static void NFC_CMD_INPUT(u32 cmd)
{
- writew(cmd, NAND_FLASH_CMD_REG);
- writew(NAND_FLASH_CONFIG2_FCMD_EN, NAND_FLASH_CONFIG2_REG);
- wait_op_done();
+ writew(cmd, NAND_FLASH_CMD_REG);
+ writew(NAND_FLASH_CONFIG2_FCMD_EN, NAND_FLASH_CONFIG2_REG);
+ wait_op_done();
}
static u16 NFC_STATUS_READ(void)
{
- u16 flash_status;
- u16 saved = readw(NAND_MAIN_BUF0);
+ u16 flash_status;
+ u16 saved = readw(NAND_MAIN_BUF0);
- NFC_CMD_INPUT(FLASH_Status);
- NFC_DATA_OUTPUT(RAM_BUF_0, FDO_FLASH_STATUS, 1);
- flash_status = readw(NAND_MAIN_BUF0) & 0x00FF;
+ NFC_CMD_INPUT(FLASH_Status);
+ NFC_DATA_OUTPUT(RAM_BUF_0, FDO_FLASH_STATUS, 1);
+ flash_status = readw(NAND_MAIN_BUF0) & 0x00FF;
- // restore
- writew(saved, NAND_MAIN_BUF0);
+ // restore
+ writew(saved, NAND_MAIN_BUF0);
- return flash_status;
+ return flash_status;
}
/*!
* @param ecc_en 1 - ecc enabled; 0 - ecc disabled
*/
static void NFC_DATA_INPUT(enum nfc_internal_buf buf_no, enum nfc_page_area area,
- int ecc_en)
+ int ecc_en)
{
- u16 config1 = (ecc_en != 0) ? NAND_FLASH_CONFIG1_ECC_EN : 0;
+ u16 config1 = (ecc_en != 0) ? NAND_FLASH_CONFIG1_ECC_EN : 0;
- config1 |= readw(NAND_FLASH_CONFIG1_REG);
+ config1 |= readw(NAND_FLASH_CONFIG1_REG);
- if (area == NFC_SPARE_ONLY) {
- config1 |= NAND_FLASH_CONFIG1_SP_EN;
+ if (area == NFC_SPARE_ONLY) {
+ config1 |= NAND_FLASH_CONFIG1_SP_EN;
#ifdef CYGPKG_HAL_ARM_MXC91221
- config1 &= ~NAND_FLASH_CONFIG1_ECC_EN;
+ config1 &= ~NAND_FLASH_CONFIG1_ECC_EN;
#endif
- }
+ }
- writew(config1, NAND_FLASH_CONFIG1_REG);
- writew(buf_no, RAM_BUFFER_ADDRESS_REG);
+ writew(config1, NAND_FLASH_CONFIG1_REG);
+ writew(buf_no, RAM_BUFFER_ADDRESS_REG);
- // start operation
- writew(NAND_FLASH_CONFIG2_FDI_EN, NAND_FLASH_CONFIG2_REG);
- wait_op_done();
+ // start operation
+ writew(NAND_FLASH_CONFIG2_FDI_EN, NAND_FLASH_CONFIG2_REG);
+ wait_op_done();
}
static void NFC_DATA_INPUT_2k(enum nfc_internal_buf buf_no)
{
- writew(buf_no, RAM_BUFFER_ADDRESS_REG);
- writew(NAND_FLASH_CONFIG2_FDI_EN, NAND_FLASH_CONFIG2_REG);
- wait_op_done();
+ writew(buf_no, RAM_BUFFER_ADDRESS_REG);
+ writew(NAND_FLASH_CONFIG2_FDI_EN, NAND_FLASH_CONFIG2_REG);
+ wait_op_done();
}
/*!
*/
static void NFC_PRESET(u32 max_block_count)
{
- // Unlock the internal RAM buffer
- writew(NFC_CONFIGURATION_UNLOCKED, NFC_CONFIGURATION_REG);
- // First Block to be unlocked
- writew(0, UNLOCK_START_BLK_ADD_REG);
- // Last Unlock Block
- writew(max_block_count, UNLOCK_END_BLK_ADD_REG);
- // Unlock Block Command
- writew(NF_WR_PROT_UNLOCK, NF_WR_PROT_REG);
+ // Unlock the internal RAM buffer
+ writew(NFC_CONFIGURATION_UNLOCKED, NFC_CONFIGURATION_REG);
+ // First Block to be unlocked
+ writew(0, UNLOCK_START_BLK_ADD_REG);
+ // Last Unlock Block
+ writew(max_block_count, UNLOCK_END_BLK_ADD_REG);
+ // Unlock Block Command
+ writew(NF_WR_PROT_UNLOCK, NF_WR_PROT_REG);
}
static void NFC_SET_NFC_ACTIVE_CS(u32 cs_line)
{
- // not needed.
+ // not needed.
}
/*!
*/
static void NFC_ADDR_INPUT(u32 addr)
{
- writew(addr & ((1 << ADDR_INPUT_SIZE) - 1), NAND_FLASH_ADD_REG);
- writew(NAND_FLASH_CONFIG2_FADD_EN, NAND_FLASH_CONFIG2_REG);
- wait_op_done();
+ writew(addr & ((1 << ADDR_INPUT_SIZE) - 1), NAND_FLASH_ADD_REG);
+ writew(NAND_FLASH_CONFIG2_FADD_EN, NAND_FLASH_CONFIG2_REG);
+ wait_op_done();
}
#if defined(NFC_V1_1)
#define NFC_ARCH_INIT()
#endif /*NFC_V1_1*/
-#define NAND_ADD0_REG 0xDEADDAED
-#define NAND_ADD8_REG 0xDEADDAED
-#define NAND_CMD_REG 0xDEADDAED
-#define NAND_LAUNCH_AUTO_PROG 0xDEADDAED
-#define NAND_STATUS_SUM_REG 0xDEADDAED
-#define NAND_LAUNCH_AUTO_READ 0xDEADDAED
-#define NAND_LAUNCH_AUTO_ERASE 0xDEADDAED
+#define NAND_ADD0_REG 0xDEADDAED
+#define NAND_ADD8_REG 0xDEADDAED
+#define NAND_CMD_REG 0xDEADDAED
+#define NAND_LAUNCH_AUTO_PROG 0xDEADDAED
+#define NAND_STATUS_SUM_REG 0xDEADDAED
+#define NAND_LAUNCH_AUTO_READ 0xDEADDAED
+#define NAND_LAUNCH_AUTO_ERASE 0xDEADDAED
#endif // _MXC_NFC_H_