RedBoot TX53 Release 2012-02-15

[karo-tx-redboot.git] / packages / hal / arm / mx53 / karo / v1_0 / include / hal_platform_setup.h

diff --git a/packages/hal/arm/mx53/karo/v1_0/include/hal_platform_setup.h b/packages/hal/arm/mx53/karo/v1_0/include/hal_platform_setup.h
index 00797d2e3c384849501d3e4b9fbaae73070d5dac..82b08d4a0cb409f8d282ba911b6fd4e89daace51 100644 (file)
--- a/packages/hal/arm/mx53/karo/v1_0/include/hal_platform_setup.h
+++ b/packages/hal/arm/mx53/karo/v1_0/include/hal_platform_setup.h
@@ -138,11 +138,10 @@ init_aips_start:
        str     r9, [r10, #GPIO_GDIR]
 
        LED_INIT
-       LED_BLINK #1
 
 init_clock_start:
        init_clock
-       LED_BLINK #2
+       LED_BLINK #1
 
 Normal_Boot_Continue:
 /*
@@ -156,6 +155,8 @@ STACK_Setup:
        orr     sp, r1, r2
 
        @ Create MMU tables
+
+       LED_BLINK #2
        bl      hal_mmu_init
        LED_BLINK #3
 
@@ -182,6 +183,7 @@ STACK_Setup:
        .ltorg
        .align  5
 10:
+       LED_BLINK #4
        .endm   @ _platform_setup1
 
        /* AIPS setup - Only setup MPROTx registers. The PACR default values are good.*/
@@ -233,7 +235,6 @@ osc_ok:
 1:
        /* make sure change is effective */
        ldr     r1, [r0, #CLKCTL_CDHIPR]
-       LED_BLINK #1
        cmp     r1, #0x0
        bne     1b
 
@@ -263,7 +264,6 @@ osc_ok:
        /* make sure change is effective */
 1:
        ldr     r1, [r0, #CLKCTL_CDHIPR]
-       LED_BLINK #1
        cmp     r1, #0x0
        bne     1b
 
@@ -380,7 +380,7 @@ delay:
        subs    r10, r10, #1
        movmi   pc, lr
 
-       ldr     r9, =(36000 / 10 / 10)
+       ldr     r9, =(36000 / 10)
 2:
        subs    r9, r9, #1
        bne     2b
@@ -568,7 +568,7 @@ CK_VAL      tODTLoff tCWL - 1, 1, 31        /* clks - 1 (0..31) */
                        (((tWR + 1) / 2) << 9) | \
                        (((tCL + 3) - 4) << 4)) << 16)
        .endif
-#define ESDSCR_MRS_VAL(cs)     (mrs_val | ((1 << (cs)) << 8))
+#define ESDSCR_MRS_VAL(cs)     (mrs_val | ((cs) << 3))
 
 #define ESDCFG0_VAL    (               \
        (tRFC << 24) |                  \
@@ -635,23 +635,31 @@ fcb_start:
        .word   0       /* Bad Block marker offset in spare area */
 fcb_end:
 
+#if BANK_ADDR_BITS > 1
+#define REDBOOT_RAM_START      (RAM_BANK1_BASE + RAM_BANK1_SIZE - REDBOOT_OFFSET)
+#else
+#define REDBOOT_RAM_START      (RAM_BANK0_BASE + RAM_BANK0_SIZE - REDBOOT_OFFSET)
+#endif
+
+#define redboot_v2p(v) ((v) - __text_start + REDBOOT_RAM_START)
+
        .org    0x400
 ivt_header:
        .word   CPU_2_BE_32((0xd1 << 24) | (32 << 8) | 0x40)
 app_start_addr:
-       .long   reset_vector
+       .long   redboot_v2p(reset_vector)
        .long   0x0
 dcd_ptr:
-       .long   dcd_hdr
+       .long   redboot_v2p(dcd_hdr)
 boot_data_ptr:
-       .word   boot_data
+       .word   redboot_v2p(boot_data)
 self_ptr:
-       .word   ivt_header
+       .word   redboot_v2p(ivt_header)
 app_code_csf:
        .word   0x0
        .word   0x0
 boot_data:
-       .long   __text_start
+       .long   redboot_v2p(__text_start)
 image_len:
        .long   REDBOOT_IMAGE_SIZE
 plugin: