RedBoot TX53 Release 2012-02-15

[karo-tx-redboot.git] / packages / hal / arm / mx53 / karo / v1_0 / src / tx53_misc.c

diff --git a/packages/hal/arm/mx53/karo/v1_0/src/tx53_misc.c b/packages/hal/arm/mx53/karo/v1_0/src/tx53_misc.c
index d3d03b7ba4869cd69b315eaf83612e1843c4f52c..c3e537f72c456d8aafd5e0a02b2f2aff8eec7172 100644 (file)
--- a/packages/hal/arm/mx53/karo/v1_0/src/tx53_misc.c
+++ b/packages/hal/arm/mx53/karo/v1_0/src/tx53_misc.c
@@ -100,9 +100,9 @@ void hal_mmu_init(void)
        /*                 Physical      Virtual         Size                   Attributes                                access permissions            Function */
        /*                 Base  Base     MB                     cached?           buffered?                                                                                     */
        /*                 xxx00000      xxx00000                                                                                */
-       X_ARM_MMU_SECTION(0x000, 0x200, 0x001, ARM_CACHEABLE,   ARM_BUFFERABLE,   ARM_ACCESS_PERM_RW_RW); /* Boot Rom */
-//     X_ARM_MMU_SECTION(0x1FF, 0x1FF, 0x001, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* IRAM */
-       X_ARM_MMU_SECTION(0x180, 0x180, 0x080, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* IPUv3D */
+       X_ARM_MMU_SECTION(0x000, 0xfff, 0x001, ARM_CACHEABLE,   ARM_BUFFERABLE,   ARM_ACCESS_PERM_RW_RW); /* Boot Rom */
+       X_ARM_MMU_SECTION(0xF80, 0xF80, 0x001, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* IRAM */
+       X_ARM_MMU_SECTION(0x180, 0x480, 0x080, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* IPUv3D */
        X_ARM_MMU_SECTION(0x500, 0x500, 0x200, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* Internal Registers */
        X_ARM_MMU_SECTION(SD_P0, 0x000, SD_S0, ARM_CACHEABLE,   ARM_BUFFERABLE,   ARM_ACCESS_PERM_RW_RW); /* SDRAM */
        X_ARM_MMU_SECTION(SD_P0, SD_C0, SD_S0, ARM_CACHEABLE,   ARM_BUFFERABLE,   ARM_ACCESS_PERM_RW_RW); /* SDRAM */
@@ -112,7 +112,10 @@ void hal_mmu_init(void)
        X_ARM_MMU_SECTION(SD_P1, SD_C1, SD_S1, ARM_CACHEABLE,   ARM_BUFFERABLE,   ARM_ACCESS_PERM_RW_RW); /* SDRAM */
        X_ARM_MMU_SECTION(SD_P1, SD_U1, SD_S1, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* SDRAM */
        /* make sure the last MiB in the upper bank of SDRAM (where RedBoot resides)
-        * has a unity mapping (required when switching MMU on) */
+        * has a unity mapping (required when switching MMU on).
+        * This mapping will overwrite the last MiB of the uncached mapping above
+        * which will be restored in plf_hardware_init().
+        */
        X_ARM_MMU_SECTION(SD_HI, SD_HI, 0x001, ARM_CACHEABLE,   ARM_BUFFERABLE,   ARM_ACCESS_PERM_RO_RO); /* SDRAM bank1 identity mapping */
 #endif
        X_ARM_MMU_SECTION(0xF40, 0xF40, 0x040, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW); /* CS1 EIM control & NFC buffer */
@@ -289,8 +292,9 @@ RedBoot_init(mxc_ipu_iomux_config, RedBoot_INIT_SECOND);
 void plf_hardware_init(void)
 {
 #ifdef RAM_BANK1_SIZE
-       /* destroy mapping for high area in SDRAM */
-       X_ARM_MMU_SECTION(SD_HI, 0, 0, 0, 0, ARM_ACCESS_PERM_NONE_NONE);
+       /* overwrite temporary mapping for high area in SDRAM with actual mapping */
+       X_ARM_MMU_SECTION(SD_P0 + SD_S0 - 1, SD_U0 + SD_S0 - 1, 1, ARM_UNCACHEABLE, ARM_UNBUFFERABLE, ARM_ACCESS_PERM_RW_RW);
+       HAL_CACHE_FLUSH_ALL();
 #endif
        uart_gpio_init();
        fec_gpio_init();