X-Git-Url: https://git.karo-electronics.de/?p=karo-tx-redboot.git;a=blobdiff_plain;f=packages%2Fdevs%2Fflash%2Farm%2Fmxc%2Fv2_0%2Fsrc%2Fmxcmci_host.c;h=07e5133e92e3f26942d33d4c534be49c64423b8d;hp=04b5ea1dfda714eb0465173296e62047ea5f1f15;hb=981551567b3d95830ff3ea683f07e93d1cbdafe7;hpb=a8d412e171ab71d22a3c646cf2f323763d33546a diff --git a/packages/devs/flash/arm/mxc/v2_0/src/mxcmci_host.c b/packages/devs/flash/arm/mxc/v2_0/src/mxcmci_host.c index 04b5ea1d..07e5133e 100644 --- a/packages/devs/flash/arm/mxc/v2_0/src/mxcmci_host.c +++ b/packages/devs/flash/arm/mxc/v2_0/src/mxcmci_host.c @@ -51,6 +51,7 @@ // //========================================================================== +#include #include #include #include @@ -104,21 +105,21 @@ void host_reset(cyg_uint32 data_transfer_width, cyg_uint32 endian_mode) void esdhc_softreset(cyg_uint32 mask) { - //wait max timeout 100ms - cyg_uint32 timeout = 100; - - esdhc_base_pointer->system_control |= mask; - - /* hw clears the bit when it's done */ - while (esdhc_base_pointer->system_control & mask) { - if (timeout == 0) { - flash_dprintf(FLASH_DEBUG_MAX, - "%s:Reset 0x%X never complete!\n"); - return; - } - timeout--; - hal_delay_us(100); - } + //wait max timeout 100ms + cyg_uint32 timeout = 100; + + esdhc_base_pointer->system_control |= mask; + + /* hw clears the bit when it's done */ + while (esdhc_base_pointer->system_control & mask) { + if (timeout == 0) { + flash_dprintf(FLASH_DEBUG_MAX, "%s: Reset did not complete\n", + __FUNCTION__); + return; + } + timeout--; + hal_delay_us(100); + } } void host_init(cyg_uint32 base_address) @@ -167,189 +168,181 @@ void host_cfg_clock(sdhc_freq_t frequency) static void esdhc_set_data_transfer_width(cyg_uint32 data_transfer_width) { - - /* Set DWT bit of protocol control register according to bus_width */ - esdhc_base_pointer->protocol_control &= ~0x6; - esdhc_base_pointer->protocol_control |= data_transfer_width; - + /* Set DWT bit of protocol control register according to bus_width */ + esdhc_base_pointer->protocol_control &= ~0x6; + esdhc_base_pointer->protocol_control |= data_transfer_width; } static void esdhc_set_endianness(cyg_uint32 endian_mode) { - - /* Set DWT bit of protocol control register according to bus_width */ - esdhc_base_pointer->protocol_control |= endian_mode; - + /* Set DWT bit of protocol control register according to bus_width */ + esdhc_base_pointer->protocol_control |= endian_mode; } cyg_uint32 host_send_cmd(command_t * cmd) { - /* Clear Interrupt status register */ - esdhc_base_pointer->interrupt_status = ESDHC_CLEAR_INTERRUPT; - //esdhc_base_pointer->interrupt_status = 0x117f01ff; + /* Clear Interrupt status register */ + esdhc_base_pointer->interrupt_status = ESDHC_CLEAR_INTERRUPT; + //esdhc_base_pointer->interrupt_status = 0x117f01ff; - /* Enable Interrupt */ - esdhc_base_pointer->interrupt_status_enable |= ESDHC_INTERRUPT_ENABLE; - //esdhc_base_pointer->interrupt_status_enable |= 0x007f0123; + /* Enable Interrupt */ + esdhc_base_pointer->interrupt_status_enable |= ESDHC_INTERRUPT_ENABLE; + //esdhc_base_pointer->interrupt_status_enable |= 0x007f0123; #if 0 - if (esdhc_check_for_send_cmd(cmd->data_present)) { - diag_printf("Data/Cmd Line Busy.\n"); - return FAIL; - } + if (esdhc_check_for_send_cmd(cmd->data_present)) { + diag_printf("Data/Cmd Line Busy.\n"); + return FAIL; + } #endif - /* Configure Command */ - esdhc_cmd_config(cmd); - - /* Wait interrupt (END COMMAND RESPONSE) */ - //diag_printf("Wait for CMD Response.\n"); - if (esdhc_wait_end_cmd_resp_intr()) { - diag_printf("Wait CMD (%d) RESPONSE TIMEOUT.\n", cmd->command); - return FAIL; - } - //Just test for Erase functionality:Lewis-20080505: - if (cmd->command == CMD38) { - flash_dprintf(FLASH_DEBUG_MAX, "%s:Check DAT0 status:\n", - __FUNCTION__); - //while(((esdhc_base_pointer->present_state) & 0x01000004)){ - // flash_dprintf(FLASH_DEBUG_MAX,"."); - // hal_delay_us(1000); - //} - /* I'm not sure the minimum value of delay */ - hal_delay_us(100000); - hal_delay_us(100000); - hal_delay_us(100000); - flash_dprintf(FLASH_DEBUG_MAX, - "\nCheck DAT0 status DONE: present_state=%x\n", - (cyg_uint32) (esdhc_base_pointer->present_state)); - } - - /* Mask all interrupts */ - //esdhc_base_pointer->interrupt_signal_enable =0; - - /* Check if an error occured */ - return esdhc_check_response(); + /* Configure Command */ + esdhc_cmd_config(cmd); + + /* Wait interrupt (END COMMAND RESPONSE) */ + //diag_printf("Wait for CMD Response.\n"); + if (esdhc_wait_end_cmd_resp_intr()) { + diag_printf("Wait CMD (%d) RESPONSE TIMEOUT.\n", cmd->command); + return FAIL; + } + //Just test for Erase functionality:Lewis-20080505: + if (cmd->command == CMD38) { + flash_dprintf(FLASH_DEBUG_MAX, "%s:Check DAT0 status:\n", + __FUNCTION__); + //while(((esdhc_base_pointer->present_state) & 0x01000004)){ + // flash_dprintf(FLASH_DEBUG_MAX,"."); + // hal_delay_us(1000); + //} + /* I'm not sure the minimum value of delay */ + hal_delay_us(100000); + hal_delay_us(100000); + hal_delay_us(100000); + flash_dprintf(FLASH_DEBUG_MAX, + "\nCheck DAT0 status DONE: present_state=%x\n", + (cyg_uint32) (esdhc_base_pointer->present_state)); + } + + /* Mask all interrupts */ + //esdhc_base_pointer->interrupt_signal_enable =0; + + /* Check if an error occured */ + return esdhc_check_response(); } static void esdhc_cmd_config(command_t * cmd) { - unsigned int transfer_type; - - /* Write Command Argument in Command Argument Register */ - esdhc_base_pointer->command_argument = cmd->arg; - - /* *Configure e-SDHC Register value according to Command */ - transfer_type = (((cmd->data_transfer) << DATA_TRANSFER_SHIFT) | - ((cmd->response_format) << RESPONSE_FORMAT_SHIFT) | - ((cmd->data_present) << DATA_PRESENT_SHIFT) | - ((cmd->crc_check) << CRC_CHECK_SHIFT) | - ((cmd->cmdindex_check) << CMD_INDEX_CHECK_SHIFT) | - ((cmd->command) << CMD_INDEX_SHIFT) | - ((cmd-> - block_count_enable_check) << - BLOCK_COUNT_ENABLE_SHIFT) | ((cmd-> - multi_single_block) << - MULTI_SINGLE_BLOCK_SELECT_SHIFT)); - - esdhc_base_pointer->command_transfer_type = transfer_type; - - //diag_printf("arg: 0x%x | tp: 0x%x\n", esdhc_base_pointer->command_argument, esdhc_base_pointer->command_transfer_type); - + unsigned int transfer_type; + + /* Write Command Argument in Command Argument Register */ + esdhc_base_pointer->command_argument = cmd->arg; + + /* *Configure e-SDHC Register value according to Command */ + transfer_type = (((cmd->data_transfer) << DATA_TRANSFER_SHIFT) | + ((cmd->response_format) << RESPONSE_FORMAT_SHIFT) | + ((cmd->data_present) << DATA_PRESENT_SHIFT) | + ((cmd->crc_check) << CRC_CHECK_SHIFT) | + ((cmd->cmdindex_check) << CMD_INDEX_CHECK_SHIFT) | + ((cmd->command) << CMD_INDEX_SHIFT) | + ((cmd-> + block_count_enable_check) << + BLOCK_COUNT_ENABLE_SHIFT) | ((cmd-> + multi_single_block) << + MULTI_SINGLE_BLOCK_SELECT_SHIFT)); + + esdhc_base_pointer->command_transfer_type = transfer_type; + + //diag_printf("arg: 0x%x | tp: 0x%x\n", esdhc_base_pointer->command_argument, esdhc_base_pointer->command_transfer_type); } static int esdhc_wait_end_cmd_resp_intr(void) { - /* Wait interrupt (END COMMAND RESPONSE) */ - cyg_uint32 i = 50000; - while (! - ((esdhc_base_pointer-> - interrupt_status) & ESDHC_STATUS_END_CMD_RESP_TIME_MSK) && i) { - i--; - hal_delay_us(10); - //diag_printf("0x%x\n", esdhc_base_pointer->interrupt_status); - } - - if (! - ((esdhc_base_pointer-> - interrupt_status) & ESDHC_STATUS_END_CMD_RESP_TIME_MSK)) { - //diag_printf("%s: can't get END COMMAND RESPONSE! Tried %d times\n", __FUNCTION__, (5000000-i)); - return FAIL; - } - - return SUCCESS; + /* Wait interrupt (END COMMAND RESPONSE) */ + cyg_uint32 i = 50000; + while (! + ((esdhc_base_pointer-> + interrupt_status) & ESDHC_STATUS_END_CMD_RESP_TIME_MSK) && i) { + i--; + hal_delay_us(10); + //diag_printf("0x%x\n", esdhc_base_pointer->interrupt_status); + } + + if (! + ((esdhc_base_pointer-> + interrupt_status) & ESDHC_STATUS_END_CMD_RESP_TIME_MSK)) { + //diag_printf("%s: can't get END COMMAND RESPONSE! Tried %d times\n", __FUNCTION__, (5000000-i)); + return FAIL; + } + + return SUCCESS; } static cyg_uint32 esdhc_check_response(void) { - cyg_uint32 status = FAIL; - - /* Check whether the interrupt is an END_CMD_RESP - * or a response time out or a CRC error - */ - if ((esdhc_base_pointer-> - interrupt_status & ESDHC_STATUS_END_CMD_RESP_MSK) - && !(esdhc_base_pointer-> - interrupt_status & ESDHC_STATUS_TIME_OUT_RESP_MSK) - && !(esdhc_base_pointer-> - interrupt_status & ESDHC_STATUS_RESP_CRC_ERR_MSK) - && !(esdhc_base_pointer-> - interrupt_status & ESDHC_STATUS_RESP_INDEX_ERR_MSK)) { - - status = SUCCESS; - } else { - //diag_printf("Warning: Check CMD response, Intr Status: 0x%x\n", esdhc_base_pointer->interrupt_status); - status = FAIL; - } - - return status; - + cyg_uint32 status = FAIL; + + /* Check whether the interrupt is an END_CMD_RESP + * or a response time out or a CRC error + */ + if ((esdhc_base_pointer-> + interrupt_status & ESDHC_STATUS_END_CMD_RESP_MSK) + && !(esdhc_base_pointer-> + interrupt_status & ESDHC_STATUS_TIME_OUT_RESP_MSK) + && !(esdhc_base_pointer-> + interrupt_status & ESDHC_STATUS_RESP_CRC_ERR_MSK) + && !(esdhc_base_pointer-> + interrupt_status & ESDHC_STATUS_RESP_INDEX_ERR_MSK)) { + + status = SUCCESS; + } else { + //diag_printf("Warning: Check CMD response, Intr Status: 0x%x\n", esdhc_base_pointer->interrupt_status); + status = FAIL; + } + + return status; } void host_read_response(command_response_t * cmd_resp) { - /* get response values from e-SDHC CMDRSP registers. */ - cmd_resp->cmd_rsp0 = (cyg_uint32) esdhc_base_pointer->command_response0; - cmd_resp->cmd_rsp1 = (cyg_uint32) esdhc_base_pointer->command_response1; - cmd_resp->cmd_rsp2 = (cyg_uint32) esdhc_base_pointer->command_response2; - cmd_resp->cmd_rsp3 = (cyg_uint32) esdhc_base_pointer->command_response3; + /* get response values from e-SDHC CMDRSP registers. */ + cmd_resp->cmd_rsp0 = (cyg_uint32) esdhc_base_pointer->command_response0; + cmd_resp->cmd_rsp1 = (cyg_uint32) esdhc_base_pointer->command_response1; + cmd_resp->cmd_rsp2 = (cyg_uint32) esdhc_base_pointer->command_response2; + cmd_resp->cmd_rsp3 = (cyg_uint32) esdhc_base_pointer->command_response3; } -static void esdhc_wait_buf_rdy_intr(cyg_uint32 mask, - multi_single_block_select - multi_single_block) +static void __attribute__((unused)) esdhc_wait_buf_rdy_intr(cyg_uint32 mask, + multi_single_block_select + multi_single_block) { - /* Wait interrupt (BUF_READ_RDY) */ + /* Wait interrupt (BUF_READ_RDY) */ - cyg_uint32 i; - for (i = 3000; i > 0; i--) { - if (esdhc_base_pointer->interrupt_status & mask) { - break; - } - hal_delay_us(100); - } + cyg_uint32 i; + for (i = 3000; i > 0; i--) { + if (esdhc_base_pointer->interrupt_status & mask) { + break; + } + hal_delay_us(100); + } - if (multi_single_block == MULTIPLE - && esdhc_base_pointer->interrupt_status & mask) - esdhc_base_pointer->interrupt_status |= mask; - if (i == 0) - flash_dprintf(FLASH_DEBUG_MAX, "%s:Debug: tried %d times\n", - __FUNCTION__, (3000 - i)); + if (multi_single_block == MULTIPLE + && esdhc_base_pointer->interrupt_status & mask) + esdhc_base_pointer->interrupt_status |= mask; + if (i == 0) + flash_dprintf(FLASH_DEBUG_MAX, "%s:Debug: tried %d times\n", + __FUNCTION__, (3000 - i)); } static void esdhc_wait_op_done_intr(cyg_uint32 transfer_mask) { - /* Wait interrupt (Transfer Complete) */ - - cyg_uint32 i; - while (!(esdhc_base_pointer->interrupt_status & transfer_mask)) ; + /* Wait interrupt (Transfer Complete) */ - //diag_printf("Wait OP Done Failed.\n"); - //flash_dprintf(FLASH_DEBUG_MAX,"%s:Debug: tried %d times\n", __FUNCTION__, (3001-i)); + while (!(esdhc_base_pointer->interrupt_status & transfer_mask)) ; + //diag_printf("Wait OP Done Failed.\n"); + //flash_dprintf(FLASH_DEBUG_MAX,"%s:Debug: tried %d times\n", __FUNCTION__, (3001-i)); } static cyg_uint32 esdhc_check_data(cyg_uint32 op_done_mask, @@ -456,7 +449,7 @@ cyg_uint32 host_data_write(cyg_uint32 * src_ptr, cyg_uint32 write_len) } -static int esdhc_check_for_send_cmd(int data_present) +static int __attribute__((unused)) esdhc_check_for_send_cmd(int data_present) { int status = SUCCESS;