mtdcr (memcfgd, tmp);
-
/*-------------------------------------------------------------------------+
| Interrupt controller setup for the PIP405 board.
| Note: IRQ 0-15 405GP internally generated; active high; level sensitive
}
-
extern int isa_init (void);
}
out8 (PLD_SCSI_RST_REG, resreg);
}
-
-