*/
static void fec_rbd_init(struct fec_priv *fec, int count, int dsize)
{
- uint32_t size;
+ size_t rbd_size, pkt_size;
void *data;
int i;
* Reload the RX descriptors with default values and wipe
* the RX buffers.
*/
- size = roundup(dsize, ARCH_DMA_MINALIGN);
+ pkt_size = roundup(dsize, ARCH_DMA_MINALIGN);
for (i = 0; i < count; i++) {
data = (void *)fec->rbd_base[i].data_pointer;
memset(data, 0, dsize);
flush_dcache_range((unsigned long)data,
- (unsigned long)data + size);
+ (unsigned long)data + pkt_size);
fec->rbd_base[i].status = FEC_RBD_EMPTY;
fec->rbd_base[i].data_length = 0;
fec->rbd_base[i - 1].status = FEC_RBD_WRAP | FEC_RBD_EMPTY;
fec->rbd_index = 0;
+ rbd_size = roundup(sizeof(struct fec_bd) * count, ARCH_DMA_MINALIGN);
flush_dcache_range((unsigned long)fec->rbd_base,
- (unsigned long)fec->rbd_base + size);
+ (unsigned long)fec->rbd_base + rbd_size);
}
/**
writel(0x00000000, &fec->eth->gaddr2);
/* Do not access reserved register for i.MX6UL */
-#ifndef CONFIG_SOC_MX6UL
+#if !(defined(CONFIG_SOC_MX6UL) || defined(CONFIG_SOC_MX6ULL))
/* FIFO receive start register */
writel(0x520, &fec->eth->r_fstart);
#endif
static int fec_alloc_descs(struct fec_priv *fec)
{
- unsigned int size;
+ size_t tbd_size, rbd_size, pkt_size;
int i;
void *data;
/* Allocate TX descriptors. */
- size = roundup(2 * sizeof(struct fec_bd), ARCH_DMA_MINALIGN);
- fec->tbd_base = memalign(ARCH_DMA_MINALIGN, size);
+ tbd_size = roundup(2 * sizeof(struct fec_bd), ARCH_DMA_MINALIGN);
+ fec->tbd_base = memalign(ARCH_DMA_MINALIGN, tbd_size);
if (!fec->tbd_base)
goto err_tx;
/* Allocate RX descriptors. */
- size = roundup(FEC_RBD_NUM * sizeof(struct fec_bd), ARCH_DMA_MINALIGN);
- fec->rbd_base = memalign(ARCH_DMA_MINALIGN, size);
+ rbd_size = roundup(FEC_RBD_NUM * sizeof(struct fec_bd), ARCH_DMA_MINALIGN);
+ fec->rbd_base = memalign(ARCH_DMA_MINALIGN, rbd_size);
if (!fec->rbd_base)
goto err_rx;
- memset(fec->rbd_base, 0, size);
+ memset(fec->rbd_base, 0, rbd_size);
/* Allocate RX buffers. */
/* Maximum RX buffer size. */
- size = roundup(FEC_MAX_PKT_SIZE, FEC_DMA_RX_MINALIGN);
+ pkt_size = roundup(FEC_MAX_PKT_SIZE, FEC_DMA_RX_MINALIGN);
for (i = 0; i < FEC_RBD_NUM; i++) {
- data = memalign(FEC_DMA_RX_MINALIGN, size);
+ data = memalign(FEC_DMA_RX_MINALIGN, pkt_size);
if (!data) {
printf("%s: error allocating rxbuf %d\n", __func__, i);
goto err_ring;
}
- memset(data, 0, size);
+ memset(data, 0, pkt_size);
fec->rbd_base[i].data_pointer = (uint32_t)data;
fec->rbd_base[i].status = FEC_RBD_EMPTY;
fec->rbd_base[i].data_length = 0;
/* Flush the buffer to memory. */
- flush_dcache_range((unsigned long)data,
- (unsigned long)data + size);
+ flush_dcache_range((uint32_t)data, (uint32_t)data + pkt_size);
}
/* Mark the last RBD to close the ring. */
fec->rbd_base[i - 1].status = FEC_RBD_WRAP | FEC_RBD_EMPTY;
+ flush_dcache_range((unsigned long)fec->rbd_base, rbd_size);
fec->rbd_index = 0;
fec->tbd_index = 0;
#endif
int ret;
-#ifdef CONFIG_SOC_MX28
+#if defined(CONFIG_SOC_MX28)
/*
* The i.MX28 has two ethernet interfaces, but they are not equal.
* Only the first one can access the MDIO bus.
*/
base_mii = MXS_ENET0_BASE;
+#elif defined(FEC_MDIO_BASE_ADDR)
+ base_mii = FEC_MDIO_BASE_ADDR;
#else
base_mii = addr;
#endif
if (!bus)
return -ENOMEM;
#ifdef CONFIG_PHYLIB
- phydev = phy_find_by_mask(bus, phy_id < 0 ? 0xff : (1 << phy_id),
+ static u8 phy_mask = 0xff;
+ phydev = phy_find_by_mask(bus, phy_id < 0 ? phy_mask : (1 << phy_id),
PHY_INTERFACE_MODE_RGMII);
if (!phydev) {
free(bus);
return -ENOMEM;
}
+ phy_mask &= ~(1 << phydev->addr);
ret = fec_probe(bd, dev_id, addr, bus, phydev);
#else
ret = fec_probe(bd, dev_id, addr, bus, phy_id);