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OMAP5: DPLL core lock for OMAP5432
authorLokesh Vutla <lokeshvutla@ti.com>
Tue, 22 May 2012 00:03:26 +0000 (00:03 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sat, 7 Jul 2012 12:07:24 +0000 (14:07 +0200)
commit753bae8c5dd4ba92a39b06ea9a551be962053f93
tree39a9614f4f53620d8f5d3c42aa7d98f1f04b46f1tree | snapshot
parent784ab7c545d25288a82216d18e2b0ca3beae470bcommit | diff
OMAP5: DPLL core lock for OMAP5432

No need to Unlock DPLL initially.
DDR3 can work at normal OPP from initialozation

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
arch/arm/cpu/armv7/omap-common/clocks-common.c diff | blob | history
arch/arm/cpu/armv7/omap-common/emif-common.c diff | blob | history
arch/arm/include/asm/arch-omap4/clocks.h diff | blob | history
arch/arm/include/asm/arch-omap5/clocks.h diff | blob | history
UBoot for KaRo TX COM modules