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ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 2
authorMarek Vasut <marex@denx.de>
Tue, 21 Jul 2015 03:54:39 +0000 (05:54 +0200)
committerMarek Vasut <marex@denx.de>
Sat, 8 Aug 2015 12:14:23 +0000 (14:14 +0200)
commitb9452ea09f8756b2d43e527e86213bedf6007597
tree72442d284181ad42602b9d426970bb6d56066ae9tree | snapshot
parentad64769ce04578e3e8f4079074b53e13e87c9d25commit | diff
ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 2

Clean up coding style, mostly broken multiline formatting strings
in debug output. Also clean up data types and constify where applicable.

Signed-off-by: Marek Vasut <marex@denx.de>
drivers/ddr/altera/sequencer.c diff | blob | history
UBoot for KaRo TX COM modules