Merge tag 'v2.6.38' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

[mv-sheeva.git] / arch / arm / mach-omap2 / clockdomains2xxx_3xxx_data.c

diff --git a/arch/arm/mach-omap2/clockdomains.h b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
similarity index 87%
rename from arch/arm/mach-omap2/clockdomains.h
rename to arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
index 8fc19ff2cd89fba645c07a6311e570d20dbc5945..e4a7133ea3b3142e2a660c6755c133d13accc730 100644 (file)
--- a/arch/arm/mach-omap2/clockdomains.h
+++ b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
@@ -4,7 +4,7 @@
  * Copyright (C) 2008-2009 Texas Instruments, Inc.
  * Copyright (C) 2008-2010 Nokia Corporation
  *
- * Written by Paul Walmsley and Jouni Högander
+ * Paul Walmsley, Jouni Högander
  *
  * This file contains clockdomains and clockdomain wakeup/sleep
  * dependencies for the OMAP2/3 chips.  Some notes:
@@ -32,12 +32,17 @@
  *    from the Power domain framework
  */
 
-#ifndef __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_H
-#define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_H
+#include <linux/kernel.h>
+#include <linux/io.h>
 
-#include <plat/clockdomain.h>
-#include "cm.h"
-#include "prm.h"
+#include "clockdomain.h"
+#include "prm2xxx_3xxx.h"
+#include "cm2xxx_3xxx.h"
+#include "cm-regbits-24xx.h"
+#include "cm-regbits-34xx.h"
+#include "cm-regbits-44xx.h"
+#include "prm-regbits-24xx.h"
+#include "prm-regbits-34xx.h"
 
 /*
  * Clockdomain dependencies for wkdeps/sleepdeps
@@ -84,8 +89,6 @@ static struct clkdm_dep gfx_sgx_wkdeps[] = {
 
 /* 24XX-specific possible dependencies */
 
-#ifdef CONFIG_ARCH_OMAP2
-
 /* Wakeup dependency source arrays */
 
 /* 2420/2430 PM_WKDEP_DSP: CORE, MPU, WKUP */
@@ -165,8 +168,6 @@ static struct clkdm_dep core_24xx_wkdeps[] = {
        { NULL },
 };
 
-#endif
-
 
 /* 2430-specific possible wakeup dependencies */
 
@@ -425,8 +426,6 @@ static struct clkdm_dep gfx_sgx_sleepdeps[] = {
  * sys_clkout/sys_clkout2.
  */
 
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-
 /* This is an implicit clockdomain - it is never defined as such in TRM */
 static struct clockdomain wkup_clkdm = {
        .name           = "wkup_clkdm",
@@ -447,8 +446,6 @@ static struct clockdomain cm_clkdm = {
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
 };
 
-#endif
-
 /*
  * 2420-only clockdomains
  */
@@ -459,7 +456,6 @@ static struct clockdomain mpu_2420_clkdm = {
        .name           = "mpu_clkdm",
        .pwrdm          = { .name = "mpu_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP,
-       .clkstctrl_reg  = OMAP2420_CM_REGADDR(MPU_MOD, OMAP2_CM_CLKSTCTRL),
        .wkdep_srcs     = mpu_24xx_wkdeps,
        .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
@@ -469,8 +465,6 @@ static struct clockdomain iva1_2420_clkdm = {
        .name           = "iva1_clkdm",
        .pwrdm          = { .name = "dsp_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-       .clkstctrl_reg  = OMAP2420_CM_REGADDR(OMAP24XX_DSP_MOD,
-                                                OMAP2_CM_CLKSTCTRL),
        .dep_bit        = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
        .wkdep_srcs     = dsp_24xx_wkdeps,
        .clktrctrl_mask = OMAP2420_AUTOSTATE_IVA_MASK,
@@ -481,8 +475,6 @@ static struct clockdomain dsp_2420_clkdm = {
        .name           = "dsp_clkdm",
        .pwrdm          = { .name = "dsp_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-       .clkstctrl_reg  = OMAP2420_CM_REGADDR(OMAP24XX_DSP_MOD,
-                                                OMAP2_CM_CLKSTCTRL),
        .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
@@ -491,7 +483,6 @@ static struct clockdomain gfx_2420_clkdm = {
        .name           = "gfx_clkdm",
        .pwrdm          = { .name = "gfx_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-       .clkstctrl_reg  = OMAP2420_CM_REGADDR(GFX_MOD, OMAP2_CM_CLKSTCTRL),
        .wkdep_srcs     = gfx_sgx_wkdeps,
        .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
@@ -501,7 +492,6 @@ static struct clockdomain core_l3_2420_clkdm = {
        .name           = "core_l3_clkdm",
        .pwrdm          = { .name = "core_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP,
-       .clkstctrl_reg  = OMAP2420_CM_REGADDR(CORE_MOD, OMAP2_CM_CLKSTCTRL),
        .wkdep_srcs     = core_24xx_wkdeps,
        .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
@@ -511,7 +501,6 @@ static struct clockdomain core_l4_2420_clkdm = {
        .name           = "core_l4_clkdm",
        .pwrdm          = { .name = "core_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP,
-       .clkstctrl_reg  = OMAP2420_CM_REGADDR(CORE_MOD, OMAP2_CM_CLKSTCTRL),
        .wkdep_srcs     = core_24xx_wkdeps,
        .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
@@ -521,7 +510,6 @@ static struct clockdomain dss_2420_clkdm = {
        .name           = "dss_clkdm",
        .pwrdm          = { .name = "core_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP,
-       .clkstctrl_reg  = OMAP2420_CM_REGADDR(CORE_MOD, OMAP2_CM_CLKSTCTRL),
        .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
@@ -539,8 +527,6 @@ static struct clockdomain mpu_2430_clkdm = {
        .name           = "mpu_clkdm",
        .pwrdm          = { .name = "mpu_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-       .clkstctrl_reg  = OMAP2430_CM_REGADDR(MPU_MOD,
-                                                OMAP2_CM_CLKSTCTRL),
        .wkdep_srcs     = mpu_24xx_wkdeps,
        .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
@@ -551,8 +537,6 @@ static struct clockdomain mdm_clkdm = {
        .name           = "mdm_clkdm",
        .pwrdm          = { .name = "mdm_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-       .clkstctrl_reg  = OMAP2430_CM_REGADDR(OMAP2430_MDM_MOD,
-                                                OMAP2_CM_CLKSTCTRL),
        .dep_bit        = OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT,
        .wkdep_srcs     = mdm_2430_wkdeps,
        .clktrctrl_mask = OMAP2430_AUTOSTATE_MDM_MASK,
@@ -563,8 +547,6 @@ static struct clockdomain dsp_2430_clkdm = {
        .name           = "dsp_clkdm",
        .pwrdm          = { .name = "dsp_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-       .clkstctrl_reg  = OMAP2430_CM_REGADDR(OMAP24XX_DSP_MOD,
-                                                OMAP2_CM_CLKSTCTRL),
        .dep_bit        = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
        .wkdep_srcs     = dsp_24xx_wkdeps,
        .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK,
@@ -575,7 +557,6 @@ static struct clockdomain gfx_2430_clkdm = {
        .name           = "gfx_clkdm",
        .pwrdm          = { .name = "gfx_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-       .clkstctrl_reg  = OMAP2430_CM_REGADDR(GFX_MOD, OMAP2_CM_CLKSTCTRL),
        .wkdep_srcs     = gfx_sgx_wkdeps,
        .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
@@ -590,7 +571,6 @@ static struct clockdomain core_l3_2430_clkdm = {
        .name           = "core_l3_clkdm",
        .pwrdm          = { .name = "core_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP,
-       .clkstctrl_reg  = OMAP2430_CM_REGADDR(CORE_MOD, OMAP2_CM_CLKSTCTRL),
        .dep_bit        = OMAP24XX_EN_CORE_SHIFT,
        .wkdep_srcs     = core_24xx_wkdeps,
        .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK,
@@ -606,7 +586,6 @@ static struct clockdomain core_l4_2430_clkdm = {
        .name           = "core_l4_clkdm",
        .pwrdm          = { .name = "core_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP,
-       .clkstctrl_reg  = OMAP2430_CM_REGADDR(CORE_MOD, OMAP2_CM_CLKSTCTRL),
        .dep_bit        = OMAP24XX_EN_CORE_SHIFT,
        .wkdep_srcs     = core_24xx_wkdeps,
        .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK,
@@ -617,7 +596,6 @@ static struct clockdomain dss_2430_clkdm = {
        .name           = "dss_clkdm",
        .pwrdm          = { .name = "core_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP,
-       .clkstctrl_reg  = OMAP2430_CM_REGADDR(CORE_MOD, OMAP2_CM_CLKSTCTRL),
        .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
@@ -635,7 +613,6 @@ static struct clockdomain mpu_3xxx_clkdm = {
        .name           = "mpu_clkdm",
        .pwrdm          = { .name = "mpu_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP | CLKDM_CAN_FORCE_WAKEUP,
-       .clkstctrl_reg  = OMAP34XX_CM_REGADDR(MPU_MOD, OMAP2_CM_CLKSTCTRL),
        .dep_bit        = OMAP3430_EN_MPU_SHIFT,
        .wkdep_srcs     = mpu_3xxx_wkdeps,
        .clktrctrl_mask = OMAP3430_CLKTRCTRL_MPU_MASK,
@@ -646,8 +623,6 @@ static struct clockdomain neon_clkdm = {
        .name           = "neon_clkdm",
        .pwrdm          = { .name = "neon_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-       .clkstctrl_reg  = OMAP34XX_CM_REGADDR(OMAP3430_NEON_MOD,
-                                                OMAP2_CM_CLKSTCTRL),
        .wkdep_srcs     = neon_wkdeps,
        .clktrctrl_mask = OMAP3430_CLKTRCTRL_NEON_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
@@ -657,8 +632,6 @@ static struct clockdomain iva2_clkdm = {
        .name           = "iva2_clkdm",
        .pwrdm          = { .name = "iva2_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-       .clkstctrl_reg  = OMAP34XX_CM_REGADDR(OMAP3430_IVA2_MOD,
-                                                OMAP2_CM_CLKSTCTRL),
        .dep_bit        = OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT,
        .wkdep_srcs     = iva2_wkdeps,
        .clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK,
@@ -669,7 +642,6 @@ static struct clockdomain gfx_3430es1_clkdm = {
        .name           = "gfx_clkdm",
        .pwrdm          = { .name = "gfx_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-       .clkstctrl_reg  = OMAP34XX_CM_REGADDR(GFX_MOD, OMAP2_CM_CLKSTCTRL),
        .wkdep_srcs     = gfx_sgx_wkdeps,
        .sleepdep_srcs  = gfx_sgx_sleepdeps,
        .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_GFX_MASK,
@@ -680,8 +652,6 @@ static struct clockdomain sgx_clkdm = {
        .name           = "sgx_clkdm",
        .pwrdm          = { .name = "sgx_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-       .clkstctrl_reg  = OMAP34XX_CM_REGADDR(OMAP3430ES2_SGX_MOD,
-                                                OMAP2_CM_CLKSTCTRL),
        .wkdep_srcs     = gfx_sgx_wkdeps,
        .sleepdep_srcs  = gfx_sgx_sleepdeps,
        .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_SGX_MASK,
@@ -699,7 +669,6 @@ static struct clockdomain d2d_clkdm = {
        .name           = "d2d_clkdm",
        .pwrdm          = { .name = "core_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-       .clkstctrl_reg  = OMAP34XX_CM_REGADDR(CORE_MOD, OMAP2_CM_CLKSTCTRL),
        .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_D2D_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
@@ -713,7 +682,6 @@ static struct clockdomain core_l3_3xxx_clkdm = {
        .name           = "core_l3_clkdm",
        .pwrdm          = { .name = "core_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP,
-       .clkstctrl_reg  = OMAP34XX_CM_REGADDR(CORE_MOD, OMAP2_CM_CLKSTCTRL),
        .dep_bit        = OMAP3430_EN_CORE_SHIFT,
        .clktrctrl_mask = OMAP3430_CLKTRCTRL_L3_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
@@ -728,7 +696,6 @@ static struct clockdomain core_l4_3xxx_clkdm = {
        .name           = "core_l4_clkdm",
        .pwrdm          = { .name = "core_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP,
-       .clkstctrl_reg  = OMAP34XX_CM_REGADDR(CORE_MOD, OMAP2_CM_CLKSTCTRL),
        .dep_bit        = OMAP3430_EN_CORE_SHIFT,
        .clktrctrl_mask = OMAP3430_CLKTRCTRL_L4_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
@@ -739,8 +706,6 @@ static struct clockdomain dss_3xxx_clkdm = {
        .name           = "dss_clkdm",
        .pwrdm          = { .name = "dss_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-       .clkstctrl_reg  = OMAP34XX_CM_REGADDR(OMAP3430_DSS_MOD,
-                                                OMAP2_CM_CLKSTCTRL),
        .dep_bit        = OMAP3430_PM_WKDEP_MPU_EN_DSS_SHIFT,
        .wkdep_srcs     = dss_wkdeps,
        .sleepdep_srcs  = dss_sleepdeps,
@@ -752,8 +717,6 @@ static struct clockdomain cam_clkdm = {
        .name           = "cam_clkdm",
        .pwrdm          = { .name = "cam_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-       .clkstctrl_reg  = OMAP34XX_CM_REGADDR(OMAP3430_CAM_MOD,
-                                                OMAP2_CM_CLKSTCTRL),
        .wkdep_srcs     = cam_wkdeps,
        .sleepdep_srcs  = cam_sleepdeps,
        .clktrctrl_mask = OMAP3430_CLKTRCTRL_CAM_MASK,
@@ -764,8 +727,6 @@ static struct clockdomain usbhost_clkdm = {
        .name           = "usbhost_clkdm",
        .pwrdm          = { .name = "usbhost_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-       .clkstctrl_reg  = OMAP34XX_CM_REGADDR(OMAP3430ES2_USBHOST_MOD,
-                                                OMAP2_CM_CLKSTCTRL),
        .wkdep_srcs     = usbhost_wkdeps,
        .sleepdep_srcs  = usbhost_sleepdeps,
        .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_USBHOST_MASK,
@@ -776,8 +737,6 @@ static struct clockdomain per_clkdm = {
        .name           = "per_clkdm",
        .pwrdm          = { .name = "per_pwrdm" },
        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-       .clkstctrl_reg  = OMAP34XX_CM_REGADDR(OMAP3430_PER_MOD,
-                                                OMAP2_CM_CLKSTCTRL),
        .dep_bit        = OMAP3430_EN_PER_SHIFT,
        .wkdep_srcs     = per_wkdeps,
        .sleepdep_srcs  = per_sleepdeps,
@@ -793,8 +752,6 @@ static struct clockdomain emu_clkdm = {
        .name           = "emu_clkdm",
        .pwrdm          = { .name = "emu_pwrdm" },
        .flags          = /* CLKDM_CAN_ENABLE_AUTO |  */CLKDM_CAN_SWSUP,
-       .clkstctrl_reg  = OMAP34XX_CM_REGADDR(OMAP3430_EMU_MOD,
-                                                OMAP2_CM_CLKSTCTRL),
        .clktrctrl_mask = OMAP3430_CLKTRCTRL_EMU_MASK,
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
@@ -831,8 +788,6 @@ static struct clockdomain dpll5_clkdm = {
 
 #endif   /* CONFIG_ARCH_OMAP3 */
 
-#include "clockdomains44xx.h"
-
 /*
  * Clockdomain hwsup dependencies (OMAP3 only)
  */
@@ -851,17 +806,10 @@ static struct clkdm_autodep clkdm_autodeps[] = {
        }
 };
 
-/*
- * List of clockdomain pointers per platform
- */
-
-static struct clockdomain *clockdomains_omap[] = {
-
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
+static struct clockdomain *clockdomains_omap2[] __initdata = {
        &wkup_clkdm,
        &cm_clkdm,
        &prm_clkdm,
-#endif
 
 #ifdef CONFIG_ARCH_OMAP2420
        &mpu_2420_clkdm,
@@ -903,35 +851,10 @@ static struct clockdomain *clockdomains_omap[] = {
        &dpll4_clkdm,
        &dpll5_clkdm,
 #endif
-
-#ifdef CONFIG_ARCH_OMAP4
-       &l4_cefuse_44xx_clkdm,
-       &l4_cfg_44xx_clkdm,
-       &tesla_44xx_clkdm,
-       &l3_gfx_44xx_clkdm,
-       &ivahd_44xx_clkdm,
-       &l4_secure_44xx_clkdm,
-       &l4_per_44xx_clkdm,
-       &abe_44xx_clkdm,
-       &l3_instr_44xx_clkdm,
-       &l3_init_44xx_clkdm,
-       &mpuss_44xx_clkdm,
-       &mpu0_44xx_clkdm,
-       &mpu1_44xx_clkdm,
-       &l3_emif_44xx_clkdm,
-       &l4_ao_44xx_clkdm,
-       &ducati_44xx_clkdm,
-       &l3_2_44xx_clkdm,
-       &l3_1_44xx_clkdm,
-       &l3_d2d_44xx_clkdm,
-       &iss_44xx_clkdm,
-       &l3_dss_44xx_clkdm,
-       &l4_wkup_44xx_clkdm,
-       &emu_sys_44xx_clkdm,
-       &l3_dma_44xx_clkdm,
-#endif
-
        NULL,
 };
 
-#endif
+void __init omap2_clockdomains_init(void)
+{
+       clkdm_init(clockdomains_omap2, clkdm_autodeps);
+}