Merge tag 'v2.6.38' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

[mv-sheeva.git] / arch / arm / mach-omap2 / omap4-common.c

diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 2f895553e6a815e5df735b47fbf89b2c191ba8d8..19268647ce367750af1c419323bd7da3947e6fb3 100644 (file)
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -26,21 +26,22 @@
 void __iomem *l2cache_base;
 #endif
 
-void __iomem *gic_cpu_base_addr;
 void __iomem *gic_dist_base_addr;
 
 
 void __init gic_init_irq(void)
 {
+       void __iomem *gic_cpu_base;
+
        /* Static mapping, never released */
        gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
        BUG_ON(!gic_dist_base_addr);
-       gic_dist_init(0, gic_dist_base_addr, 29);
 
        /* Static mapping, never released */
-       gic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
-       BUG_ON(!gic_cpu_base_addr);
-       gic_cpu_init(0, gic_cpu_base_addr);
+       gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
+       BUG_ON(!gic_cpu_base);
+
+       gic_init(0, 29, gic_dist_base_addr, gic_cpu_base);
 }
 
 #ifdef CONFIG_CACHE_L2X0
@@ -53,6 +54,8 @@ static void omap4_l2x0_disable(void)
 
 static int __init omap_l2_cache_init(void)
 {
+       u32 aux_ctrl = 0;
+
        /*
         * To avoid code running on other OMAPs in
         * multi-omap builds
@@ -64,18 +67,32 @@ static int __init omap_l2_cache_init(void)
        l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K);
        BUG_ON(!l2cache_base);
 
-       /* Enable PL310 L2 Cache controller */
-       omap_smc1(0x102, 0x1);
-
        /*
         * 16-way associativity, parity disabled
         * Way size - 32KB (es1.0)
         * Way size - 64KB (es2.0 +)
         */
-       if (omap_rev() == OMAP4430_REV_ES1_0)
-               l2x0_init(l2cache_base, 0x0e050000, 0xc0000fff);
-       else
-               l2x0_init(l2cache_base, 0x0e070000, 0xc0000fff);
+       aux_ctrl = ((1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT) |
+                       (0x1 << 25) |
+                       (0x1 << L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT) |
+                       (0x1 << L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT));
+
+       if (omap_rev() == OMAP4430_REV_ES1_0) {
+               aux_ctrl |= 0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT;
+       } else {
+               aux_ctrl |= ((0x3 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) |
+                       (1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) |
+                       (1 << L2X0_AUX_CTRL_DATA_PREFETCH_SHIFT) |
+                       (1 << L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT) |
+                       (1 << L2X0_AUX_CTRL_EARLY_BRESP_SHIFT));
+       }
+       if (omap_rev() != OMAP4430_REV_ES1_0)
+               omap_smc1(0x109, aux_ctrl);
+
+       /* Enable PL310 L2 Cache controller */
+       omap_smc1(0x102, 0x1);
+
+       l2x0_init(l2cache_base, aux_ctrl, L2X0_AUX_CTRL_MASK);
 
        /*
         * Override default outer_cache.disable with a OMAP4