Merge tag 'v2.6.38' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

[mv-sheeva.git] / arch / arm / mach-vexpress / platsmp.c

diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c
index 670970699ba93e09d2b270cdc0a061b17b64177b..634bf1d3a311d13360c32c269fedbe81e146d3fd 100644 (file)
--- a/arch/arm/mach-vexpress/platsmp.c
+++ b/arch/arm/mach-vexpress/platsmp.c
@@ -17,7 +17,6 @@
 #include <linux/io.h>
 
 #include <asm/cacheflush.h>
-#include <asm/localtimer.h>
 #include <asm/smp_scu.h>
 #include <asm/unified.h>
 
@@ -35,6 +34,19 @@ extern void vexpress_secondary_startup(void);
  */
 volatile int __cpuinitdata pen_release = -1;
 
+/*
+ * Write pen_release in a way that is guaranteed to be visible to all
+ * observers, irrespective of whether they're taking part in coherency
+ * or not.  This is necessary for the hotplug code to work reliably.
+ */
+static void __cpuinit write_pen_release(int val)
+{
+       pen_release = val;
+       smp_wmb();
+       __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
+       outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
+}
+
 static void __iomem *scu_base_addr(void)
 {
        return MMIO_P2V(A9_MPCORE_SCU);
@@ -44,21 +56,18 @@ static DEFINE_SPINLOCK(boot_lock);
 
 void __cpuinit platform_secondary_init(unsigned int cpu)
 {
-       trace_hardirqs_off();
-
        /*
         * if any interrupts are already enabled for the primary
         * core (e.g. timer irq), then they will not have been enabled
         * for us: do so
         */
-       gic_cpu_init(0, gic_cpu_base_addr);
+       gic_secondary_init(0);
 
        /*
         * let the primary processor know we're out of the
         * pen, then head off into the C entry point
         */
-       pen_release = -1;
-       smp_wmb();
+       write_pen_release(-1);
 
        /*
         * Synchronise with the boot thread.
@@ -83,16 +92,14 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
         * since we haven't sent them a soft interrupt, they shouldn't
         * be there.
         */
-       pen_release = cpu;
-       __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
-       outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
+       write_pen_release(cpu);
 
        /*
         * Send the secondary CPU a soft interrupt, thereby causing
         * the boot monitor to read the system wide flags register,
         * and branch to the address found there.
         */
-       smp_cross_call(cpumask_of(cpu));
+       smp_cross_call(cpumask_of(cpu), 1);
 
        timeout = jiffies + (1 * HZ);
        while (time_before(jiffies, timeout)) {
@@ -124,13 +131,6 @@ void __init smp_init_cpus(void)
        ncores = scu_base ? scu_get_core_count(scu_base) : 1;
 
        /* sanity check */
-       if (ncores == 0) {
-               printk(KERN_ERR
-                      "vexpress: strange CM count of 0? Default to 1\n");
-
-               ncores = 1;
-       }
-
        if (ncores > NR_CPUS) {
                printk(KERN_WARNING
                       "vexpress: no. of cores (%d) greater than configured "
@@ -143,20 +143,10 @@ void __init smp_init_cpus(void)
                set_cpu_possible(i, true);
 }
 
-void __init smp_prepare_cpus(unsigned int max_cpus)
+void __init platform_smp_prepare_cpus(unsigned int max_cpus)
 {
-       unsigned int ncores = num_possible_cpus();
-       unsigned int cpu = smp_processor_id();
        int i;
 
-       smp_store_cpu_info(cpu);
-
-       /*
-        * are we trying to boot more cores than exist?
-        */
-       if (max_cpus > ncores)
-               max_cpus = ncores;
-
        /*
         * Initialise the present map, which describes the set of CPUs
         * actually populated at the present time.
@@ -164,27 +154,15 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
        for (i = 0; i < max_cpus; i++)
                set_cpu_present(i, true);
 
+       scu_enable(scu_base_addr());
+
        /*
-        * Initialise the SCU if there are more than one CPU and let
-        * them know where to start.
+        * Write the address of secondary startup into the
+        * system-wide flags register. The boot monitor waits
+        * until it receives a soft interrupt, and then the
+        * secondary CPU branches to this address.
         */
-       if (max_cpus > 1) {
-               /*
-                * Enable the local timer or broadcast device for the
-                * boot CPU, but only if we have more than one CPU.
-                */
-               percpu_timer_setup();
-
-               scu_enable(scu_base_addr());
-
-               /*
-                * Write the address of secondary startup into the
-                * system-wide flags register. The boot monitor waits
-                * until it receives a soft interrupt, and then the
-                * secondary CPU branches to this address.
-                */
-               writel(~0, MMIO_P2V(V2M_SYS_FLAGSCLR));
-               writel(BSYM(virt_to_phys(vexpress_secondary_startup)),
-                       MMIO_P2V(V2M_SYS_FLAGSSET));
-       }
+       writel(~0, MMIO_P2V(V2M_SYS_FLAGSCLR));
+       writel(BSYM(virt_to_phys(vexpress_secondary_startup)),
+               MMIO_P2V(V2M_SYS_FLAGSSET));
 }