Merge branch 'master' into csb1725

[mv-sheeva.git] / arch / arm / mm / cache-v3.S

diff --git a/arch/arm/mm/cache-v3.S b/arch/arm/mm/cache-v3.S
index c2ff3c599feed47eb77d92190d29958fb95e8315..2e2bc406a18d69f93de13600732bb3d6fa329135 100644 (file)
--- a/arch/arm/mm/cache-v3.S
+++ b/arch/arm/mm/cache-v3.S
@@ -12,6 +12,15 @@
 #include <asm/page.h>
 #include "proc-macros.S"
 
+/*
+ *     flush_icache_all()
+ *
+ *     Unconditionally clean and invalidate the entire icache.
+ */
+ENTRY(v3_flush_icache_all)
+       mov     pc, lr
+ENDPROC(v3_flush_icache_all)
+
 /*
  *     flush_user_cache_all()
  *
@@ -122,6 +131,7 @@ ENDPROC(v3_dma_map_area)
 
        .type   v3_cache_fns, #object
 ENTRY(v3_cache_fns)
+       .long   v3_flush_icache_all
        .long   v3_flush_kern_cache_all
        .long   v3_flush_user_cache_all
        .long   v3_flush_user_cache_range