Merge branch 'master' into tk71

[mv-sheeva.git] / arch / arm / mm / proc-arm1022.S

diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index 1ffa4eb9c34f7d7d2f1b5ad5e3825daf67d14156..831c5e54e22f0e7fe795bedc4d619dae26ed9c39 100644 (file)
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -108,6 +108,20 @@ ENTRY(cpu_arm1022_do_idle)
 /* ================================= CACHE ================================ */
 
        .align  5
+
+/*
+ *     flush_icache_all()
+ *
+ *     Unconditionally clean and invalidate the entire icache.
+ */
+ENTRY(arm1022_flush_icache_all)
+#ifndef CONFIG_CPU_ICACHE_DISABLE
+       mov     r0, #0
+       mcr     p15, 0, r0, c7, c5, 0           @ invalidate I cache
+#endif
+       mov     pc, lr
+ENDPROC(arm1022_flush_icache_all)
+
 /*
  *     flush_user_cache_all()
  *
@@ -326,6 +340,7 @@ ENTRY(arm1022_dma_unmap_area)
 ENDPROC(arm1022_dma_unmap_area)
 
 ENTRY(arm1022_cache_fns)
+       .long   arm1022_flush_icache_all
        .long   arm1022_flush_kern_cache_all
        .long   arm1022_flush_user_cache_all
        .long   arm1022_flush_user_cache_range
@@ -394,7 +409,7 @@ ENTRY(cpu_arm1022_set_pte_ext)
 #endif /* CONFIG_MMU */
        mov     pc, lr
 
-       __INIT
+       __CPUINIT
 
        .type   __arm1022_setup, #function
 __arm1022_setup: