Merge branch 'master' into csb1725

[mv-sheeva.git] / arch / arm / mm / proc-arm925.S

diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 657bd3f7c153bf033f704636a323339129bb5d11..c13e01accfe2e4d38dc5e7e22d6aba32bfd0ce0a 100644 (file)
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -144,6 +144,17 @@ ENTRY(cpu_arm925_do_idle)
        mcr     p15, 0, r1, c1, c0, 0           @ Restore ICache enable
        mov     pc, lr
 
+/*
+ *     flush_icache_all()
+ *
+ *     Unconditionally clean and invalidate the entire icache.
+ */
+ENTRY(arm925_flush_icache_all)
+       mov     r0, #0
+       mcr     p15, 0, r0, c7, c5, 0           @ invalidate I cache
+       mov     pc, lr
+ENDPROC(arm925_flush_icache_all)
+
 /*
  *     flush_user_cache_all()
  *
@@ -362,6 +373,7 @@ ENTRY(arm925_dma_unmap_area)
 ENDPROC(arm925_dma_unmap_area)
 
 ENTRY(arm925_cache_fns)
+       .long   arm925_flush_icache_all
        .long   arm925_flush_kern_cache_all
        .long   arm925_flush_user_cache_all
        .long   arm925_flush_user_cache_range
@@ -428,7 +440,7 @@ ENTRY(cpu_arm925_set_pte_ext)
 #endif /* CONFIG_MMU */
        mov     pc, lr
 
-       __INIT
+       __CPUINIT
 
        .type   __arm925_setup, #function
 __arm925_setup: