Merge tag 'v2.6.38' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

[mv-sheeva.git] / arch / arm / plat-mxc / include / mach / mx21.h

diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h
index 8bc59720b6e4be8ed7b52c08bece17cf35c0cfb1..6cd049ebbd8d8e94a29393427b5fa14266d5fae8 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/mx21.h
+++ b/arch/arm/plat-mxc/include/mach/mx21.h
@@ -26,7 +26,6 @@
 #define __MACH_MX21_H__
 
 #define MX21_AIPI_BASE_ADDR            0x10000000
-#define MX21_AIPI_BASE_ADDR_VIRT       0xf4000000
 #define MX21_AIPI_SIZE                 SZ_1M
 #define MX21_DMA_BASE_ADDR                     (MX21_AIPI_BASE_ADDR + 0x01000)
 #define MX21_WDOG_BASE_ADDR                    (MX21_AIPI_BASE_ADDR + 0x02000)
@@ -49,6 +48,12 @@
 #define MX21_SDHC1_BASE_ADDR                   (MX21_AIPI_BASE_ADDR + 0x13000)
 #define MX21_SDHC2_BASE_ADDR                   (MX21_AIPI_BASE_ADDR + 0x14000)
 #define MX21_GPIO_BASE_ADDR                    (MX21_AIPI_BASE_ADDR + 0x15000)
+#define MX21_GPIO1_BASE_ADDR                   (MX21_GPIO_BASE_ADDR + 0x000)
+#define MX21_GPIO2_BASE_ADDR                   (MX21_GPIO_BASE_ADDR + 0x100)
+#define MX21_GPIO3_BASE_ADDR                   (MX21_GPIO_BASE_ADDR + 0x200)
+#define MX21_GPIO4_BASE_ADDR                   (MX21_GPIO_BASE_ADDR + 0x300)
+#define MX21_GPIO5_BASE_ADDR                   (MX21_GPIO_BASE_ADDR + 0x400)
+#define MX21_GPIO6_BASE_ADDR                   (MX21_GPIO_BASE_ADDR + 0x500)
 #define MX21_AUDMUX_BASE_ADDR                  (MX21_AIPI_BASE_ADDR + 0x16000)
 #define MX21_CSPI3_BASE_ADDR                   (MX21_AIPI_BASE_ADDR + 0x17000)
 #define MX21_LCDC_BASE_ADDR                    (MX21_AIPI_BASE_ADDR + 0x21000)
@@ -64,7 +69,6 @@
 #define MX21_AVIC_BASE_ADDR            0x10040000
 
 #define MX21_SAHB1_BASE_ADDR           0x80000000
-#define MX21_SAHB1_BASE_ADDR_VIRT      0xf4100000
 #define MX21_SAHB1_SIZE                        SZ_1M
 #define MX21_CSI_BASE_ADDR                     (MX2x_SAHB1_BASE_ADDR + 0x0000)
 
@@ -82,7 +86,6 @@
 
 /* NAND, SDRAM, WEIM etc controllers */
 #define MX21_X_MEMC_BASE_ADDR          0xdf000000
-#define MX21_X_MEMC_BASE_ADDR_VIRT     0xf4200000
 #define MX21_X_MEMC_SIZE               SZ_256K
 
 #define MX21_SDRAMC_BASE_ADDR          (MX21_X_MEMC_BASE_ADDR + 0x0000)
@@ -92,10 +95,8 @@
 
 #define MX21_IRAM_BASE_ADDR            0xffffe800      /* internal ram */
 
-#define MX21_IO_ADDRESS(x) (                                           \
-       IMX_IO_ADDRESS(x, MX21_AIPI) ?:                                 \
-       IMX_IO_ADDRESS(x, MX21_SAHB1) ?:                                \
-       IMX_IO_ADDRESS(x, MX21_X_MEMC))
+#define MX21_IO_P2V(x)                 IMX_IO_P2V(x)
+#define MX21_IO_ADDRESS(x)             IOMEM(MX21_IO_P2V(x))
 
 /* fixed interrupt numbers */
 #define MX21_INT_CSPI3         6
@@ -184,39 +185,4 @@
 #define MX21_DMA_REQ_CSI_STAT  30
 #define MX21_DMA_REQ_CSI_RX    31
 
-#ifdef IMX_NEEDS_DEPRECATED_SYMBOLS
-/* these should go away */
-#define SDRAM_BASE_ADDR MX21_SDRAM_BASE_ADDR
-#define CSD1_BASE_ADDR MX21_CSD1_BASE_ADDR
-#define CS0_BASE_ADDR MX21_CS0_BASE_ADDR
-#define CS1_BASE_ADDR MX21_CS1_BASE_ADDR
-#define CS2_BASE_ADDR MX21_CS2_BASE_ADDR
-#define CS3_BASE_ADDR MX21_CS3_BASE_ADDR
-#define CS4_BASE_ADDR MX21_CS4_BASE_ADDR
-#define PCMCIA_MEM_BASE_ADDR MX21_PCMCIA_MEM_BASE_ADDR
-#define CS5_BASE_ADDR MX21_CS5_BASE_ADDR
-#define X_MEMC_BASE_ADDR MX21_X_MEMC_BASE_ADDR
-#define X_MEMC_BASE_ADDR_VIRT MX21_X_MEMC_BASE_ADDR_VIRT
-#define X_MEMC_SIZE MX21_X_MEMC_SIZE
-#define SDRAMC_BASE_ADDR MX21_SDRAMC_BASE_ADDR
-#define EIM_BASE_ADDR MX21_EIM_BASE_ADDR
-#define PCMCIA_CTL_BASE_ADDR MX21_PCMCIA_CTL_BASE_ADDR
-#define NFC_BASE_ADDR MX21_NFC_BASE_ADDR
-#define IRAM_BASE_ADDR MX21_IRAM_BASE_ADDR
-#define MXC_INT_FIRI MX21_INT_FIRI
-#define MXC_INT_BMI MX21_INT_BMI
-#define MXC_INT_EMMAENC MX21_INT_EMMAENC
-#define MXC_INT_EMMADEC MX21_INT_EMMADEC
-#define MXC_INT_USBWKUP MX21_INT_USBWKUP
-#define MXC_INT_USBDMA MX21_INT_USBDMA
-#define MXC_INT_USBHOST MX21_INT_USBHOST
-#define MXC_INT_USBFUNC MX21_INT_USBFUNC
-#define MXC_INT_USBMNP MX21_INT_USBMNP
-#define MXC_INT_USBCTRL MX21_INT_USBCTRL
-#define MXC_INT_USBCTRL MX21_INT_USBCTRL
-#define DMA_REQ_FIRI_RX MX21_DMA_REQ_FIRI_RX
-#define DMA_REQ_BMI_TX MX21_DMA_REQ_BMI_TX
-#define DMA_REQ_BMI_RX MX21_DMA_REQ_BMI_RX
-#endif
-
 #endif /* ifndef __MACH_MX21_H__ */