Merge tag 'v2.6.38' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

[mv-sheeva.git] / arch / arm / plat-mxc / include / mach / mx25.h

diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index cf46a45b0d4e54971d3fe829bfc8a7c7942aaebc..087cd7ac8d5228264e68c347b17011aa8363bbd1 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -2,13 +2,10 @@
 #define __MACH_MX25_H__
 
 #define MX25_AIPS1_BASE_ADDR           0x43f00000
-#define MX25_AIPS1_BASE_ADDR_VIRT      0xfc000000
 #define MX25_AIPS1_SIZE                        SZ_1M
 #define MX25_AIPS2_BASE_ADDR           0x53f00000
-#define MX25_AIPS2_BASE_ADDR_VIRT      0xfc200000
 #define MX25_AIPS2_SIZE                        SZ_1M
 #define MX25_AVIC_BASE_ADDR            0x68000000
-#define MX25_AVIC_BASE_ADDR_VIRT       0xfc400000
 #define MX25_AVIC_SIZE                 SZ_1M
 
 #define MX25_I2C1_BASE_ADDR            (MX25_AIPS1_BASE_ADDR + 0x80000)
@@ -21,20 +18,15 @@
 
 #define MX25_CRM_BASE_ADDR             (MX25_AIPS2_BASE_ADDR + 0x80000)
 #define MX25_GPT1_BASE_ADDR            (MX25_AIPS2_BASE_ADDR + 0x90000)
+#define MX25_GPIO4_BASE_ADDR           (MX25_AIPS2_BASE_ADDR + 0x9c000)
+#define MX25_PWM2_BASE_ADDR            (MX25_AIPS2_BASE_ADDR + 0xa0000)
+#define MX25_GPIO3_BASE_ADDR           (MX25_AIPS2_BASE_ADDR + 0xa4000)
+#define MX25_PWM3_BASE_ADDR            (MX25_AIPS2_BASE_ADDR + 0xa8000)
+#define MX25_PWM4_BASE_ADDR            (MX25_AIPS2_BASE_ADDR + 0xc8000)
+#define MX25_GPIO1_BASE_ADDR           (MX25_AIPS2_BASE_ADDR + 0xcc000)
+#define MX25_GPIO2_BASE_ADDR           (MX25_AIPS2_BASE_ADDR + 0xd0000)
 #define MX25_WDOG_BASE_ADDR            (MX25_AIPS2_BASE_ADDR + 0xdc000)
-
-#define MX25_GPIO1_BASE_ADDR_VIRT      (MX25_AIPS2_BASE_ADDR_VIRT + 0xcc000)
-#define MX25_GPIO2_BASE_ADDR_VIRT      (MX25_AIPS2_BASE_ADDR_VIRT + 0xd0000)
-#define MX25_GPIO3_BASE_ADDR_VIRT      (MX25_AIPS2_BASE_ADDR_VIRT + 0xa4000)
-#define MX25_GPIO4_BASE_ADDR_VIRT      (MX25_AIPS2_BASE_ADDR_VIRT + 0x9c000)
-
-#define MX25_IO_ADDRESS(x) (                                   \
-       IMX_IO_ADDRESS(x, MX25_AIPS1) ?:                        \
-       IMX_IO_ADDRESS(x, MX25_AIPS2) ?:                        \
-       IMX_IO_ADDRESS(x, MX25_AVIC))
-
-#define MX25_AIPS1_IO_ADDRESS(x) \
-       (((x) - MX25_AIPS1_BASE_ADDR) + MX25_AIPS1_BASE_ADDR_VIRT)
+#define MX25_PWM1_BASE_ADDR            (MX25_AIPS2_BASE_ADDR + 0xe0000)
 
 #define MX25_UART1_BASE_ADDR           0x43f90000
 #define MX25_UART2_BASE_ADDR           0x43f94000
@@ -55,9 +47,19 @@
 #define MX25_LCDC_BASE_ADDR            0x53fbc000
 #define MX25_KPP_BASE_ADDR             0x43fa8000
 #define MX25_SDMA_BASE_ADDR            0x53fd4000
-#define MX25_OTG_BASE_ADDR             0x53ff4000
+#define MX25_USB_BASE_ADDR             0x53ff4000
+#define MX25_USB_OTG_BASE_ADDR                 (MX25_USB_BASE_ADDR + 0x0000)
+/*
+ * The reference manual (IMX25RM, Rev. 1, 06/2009) specifies an offset of 0x200
+ * for the host controller.  Early documentation drafts specified 0x400 and
+ * Freescale internal sources confirm only the latter value to work.
+ */
+#define MX25_USB_HS_BASE_ADDR                  (MX25_USB_BASE_ADDR + 0x0400)
 #define MX25_CSI_BASE_ADDR             0x53ff8000
 
+#define MX25_IO_P2V(x)                 IMX_IO_P2V(x)
+#define MX25_IO_ADDRESS(x)             IOMEM(MX25_IO_P2V(x))
+
 #define MX25_INT_CSPI3         0
 #define MX25_INT_I2C1          3
 #define MX25_INT_I2C2          4
@@ -69,18 +71,28 @@
 #define MX25_INT_SSI1          12
 #define MX25_INT_CSPI2         13
 #define MX25_INT_CSPI1         14
+#define MX25_INT_GPIO3         16
 #define MX25_INT_CSI           17
 #define MX25_INT_UART3         18
+#define MX25_INT_GPIO4         23
 #define MX25_INT_KPP           24
 #define MX25_INT_DRYICE                25
+#define MX25_INT_PWM1          26
 #define MX25_INT_UART2         32
 #define MX25_INT_NFC           33
 #define MX25_INT_SDMA          34
+#define MX25_INT_USB_HS                35
+#define MX25_INT_PWM2          36
+#define MX25_INT_USB_OTG       37
 #define MX25_INT_LCDC          39
 #define MX25_INT_UART5         40
+#define MX25_INT_PWM3          41
+#define MX25_INT_PWM4          42
 #define MX25_INT_CAN1          43
 #define MX25_INT_CAN2          44
 #define MX25_INT_UART1         45
+#define MX25_INT_GPIO2         51
+#define MX25_INT_GPIO1         52
 #define MX25_INT_FEC           57
 
 #define MX25_DMA_REQ_SSI2_RX1  22