Merge tag 'v2.6.38' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

[mv-sheeva.git] / arch / s390 / kernel / compat_ptrace.h

diff --git a/arch/s390/kernel/compat_ptrace.h b/arch/s390/kernel/compat_ptrace.h
index 3141025724f418e51d4420cc07aa340efb89d6e9..12b823833510c4211ecd38f7a9e1aff290a3ec4e 100644 (file)
--- a/arch/s390/kernel/compat_ptrace.h
+++ b/arch/s390/kernel/compat_ptrace.h
@@ -4,40 +4,19 @@
 #include <asm/ptrace.h>    /* needed for NUM_CR_WORDS */
 #include "compat_linux.h"  /* needed for psw_compat_t */
 
-typedef struct {
-       __u32 cr[NUM_CR_WORDS];
-} per_cr_words32;
-
-typedef struct {
-       __u16          perc_atmid;          /* 0x096 */
-       __u32          address;             /* 0x098 */
-       __u8           access_id;           /* 0x0a1 */
-} per_lowcore_words32;
-
-typedef struct {
-       union {
-               per_cr_words32   words;
-       } control_regs;
-       /*
-        * Use these flags instead of setting em_instruction_fetch
-        * directly they are used so that single stepping can be
-        * switched on & off while not affecting other tracing
-        */
-       unsigned  single_step       : 1;
-       unsigned  instruction_fetch : 1;
-       unsigned                    : 30;
-       /*
-        * These addresses are copied into cr10 & cr11 if single
-        * stepping is switched off
-        */
-       __u32     starting_addr;
-       __u32     ending_addr;
-       union {
-               per_lowcore_words32 words;
-       } lowcore; 
-} per_struct32;
+struct compat_per_struct_kernel {
+       __u32 cr9;              /* PER control bits */
+       __u32 cr10;             /* PER starting address */
+       __u32 cr11;             /* PER ending address */
+       __u32 bits;             /* Obsolete software bits */
+       __u32 starting_addr;    /* User specified start address */
+       __u32 ending_addr;      /* User specified end address */
+       __u16 perc_atmid;       /* PER trap ATMID */
+       __u32 address;          /* PER trap instruction address */
+       __u8  access_id;        /* PER trap access identification */
+};
 
-struct user_regs_struct32
+struct compat_user_regs_struct
 {
        psw_compat_t psw;
        u32 gprs[NUM_GPRS];
@@ -50,14 +29,14 @@ struct user_regs_struct32
         * itself as there is no "official" ptrace interface for hardware
         * watchpoints. This is the way intel does it.
         */
-       per_struct32 per_info;
+       struct compat_per_struct_kernel per_info;
        u32  ieee_instruction_pointer;  /* obsolete, always 0 */
 };
 
-struct user32 {
+struct compat_user {
        /* We start with the registers, to mimic the way that "memory"
           is returned from the ptrace(3,...) function.  */
-       struct user_regs_struct32 regs; /* Where the registers are actually stored */
+       struct compat_user_regs_struct regs;
        /* The rest of this junk is to help gdb figure out what goes where */
        u32 u_tsize;            /* Text segment size (pages). */
        u32 u_dsize;            /* Data segment size (pages). */
@@ -79,6 +58,6 @@ typedef struct
        __u32   len;
        __u32   kernel_addr;
        __u32   process_addr;
-} ptrace_area_emu31;
+} compat_ptrace_area;
 
 #endif /* _PTRACE32_H */