Merge branch 'master' into csb1725

[mv-sheeva.git] / arch / x86 / platform / uv / uv_time.c

diff --git a/arch/x86/kernel/uv_time.c b/arch/x86/platform/uv/uv_time.c
similarity index 98%
rename from arch/x86/kernel/uv_time.c
rename to arch/x86/platform/uv/uv_time.c
index 56e421bc379b19931d4db718b35e3b92e71c3d5e..9daf5d1af9f190015b8b9be646aac14cbe6c2c44 100644 (file)
--- a/arch/x86/kernel/uv_time.c
+++ b/arch/x86/platform/uv/uv_time.c
@@ -89,6 +89,7 @@ static void uv_rtc_send_IPI(int cpu)
 
        apicid = cpu_physical_id(cpu);
        pnode = uv_apicid_to_pnode(apicid);
+       apicid |= uv_apicid_hibits;
        val = (1UL << UVH_IPI_INT_SEND_SHFT) |
              (apicid << UVH_IPI_INT_APIC_ID_SHFT) |
              (X86_PLATFORM_IPI_VECTOR << UVH_IPI_INT_VECTOR_SHFT);
@@ -107,6 +108,7 @@ static int uv_intr_pending(int pnode)
 static int uv_setup_intr(int cpu, u64 expires)
 {
        u64 val;
+       unsigned long apicid = cpu_physical_id(cpu) | uv_apicid_hibits;
        int pnode = uv_cpu_to_pnode(cpu);
 
        uv_write_global_mmr64(pnode, UVH_RTC1_INT_CONFIG,
@@ -117,7 +119,7 @@ static int uv_setup_intr(int cpu, u64 expires)
                UVH_EVENT_OCCURRED0_RTC1_MASK);
 
        val = (X86_PLATFORM_IPI_VECTOR << UVH_RTC1_INT_CONFIG_VECTOR_SHFT) |
-               ((u64)cpu_physical_id(cpu) << UVH_RTC1_INT_CONFIG_APIC_ID_SHFT);
+               ((u64)apicid << UVH_RTC1_INT_CONFIG_APIC_ID_SHFT);
 
        /* Set configuration */
        uv_write_global_mmr64(pnode, UVH_RTC1_INT_CONFIG, val);