Merge branch 'master' into tk71

[mv-sheeva.git] / drivers / gpu / drm / radeon / radeon_fb.c

diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c
index 40b0c087b5921384d46bf7f745cf93f2b391015b..cc44bdfec80f2239a2d07bdf88ab2bc7ac1b53e1 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -59,6 +59,8 @@ static struct fb_ops radeonfb_ops = {
        .fb_pan_display = drm_fb_helper_pan_display,
        .fb_blank = drm_fb_helper_blank,
        .fb_setcmap = drm_fb_helper_setcmap,
+       .fb_debug_enter = drm_fb_helper_debug_enter,
+       .fb_debug_leave = drm_fb_helper_debug_leave,
 };
 
 
@@ -111,11 +113,14 @@ static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
        u32 tiling_flags = 0;
        int ret;
        int aligned_size, size;
+       int height = mode_cmd->height;
 
        /* need to align pitch with crtc limits */
        mode_cmd->pitch = radeon_align_pitch(rdev, mode_cmd->width, mode_cmd->bpp, fb_tiled) * ((mode_cmd->bpp + 1) / 8);
 
-       size = mode_cmd->pitch * mode_cmd->height;
+       if (rdev->family >= CHIP_R600)
+               height = ALIGN(mode_cmd->height, 8);
+       size = mode_cmd->pitch * height;
        aligned_size = ALIGN(size, PAGE_SIZE);
        ret = radeon_gem_object_create(rdev, aligned_size, 0,
                                       RADEON_GEM_DOMAIN_VRAM,
@@ -243,10 +248,8 @@ static int radeonfb_create(struct radeon_fbdev *rfbdev,
                goto out_unref;
        }
        info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base;
-       info->apertures->ranges[0].size = rdev->mc.real_vram_size;
+       info->apertures->ranges[0].size = rdev->mc.aper_size;
 
-       info->fix.mmio_start = 0;
-       info->fix.mmio_len = 0;
        info->pixmap.size = 64*1024;
        info->pixmap.buf_align = 8;
        info->pixmap.access_align = 32;