Merge tag 'v2.6.38' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

[mv-sheeva.git] / drivers / gpu / drm / radeon / radeon_legacy_crtc.c

diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
index ace2e6384d4093a688b856c7a5369a9b4124fe94..78968b738e88ea5d0df47210bf780d64a5ead1fb 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
@@ -443,7 +443,7 @@ int radeon_crtc_do_set_base(struct drm_crtc *crtc,
                       (target_fb->bits_per_pixel * 8));
        crtc_pitch |= crtc_pitch << 16;
 
-
+       crtc_offset_cntl |= RADEON_CRTC_GUI_TRIG_OFFSET_LEFT_EN;
        if (tiling_flags & RADEON_TILING_MACRO) {
                if (ASIC_IS_R300(rdev))
                        crtc_offset_cntl |= (R300_CRTC_X_Y_MODE_EN |
@@ -502,6 +502,7 @@ int radeon_crtc_do_set_base(struct drm_crtc *crtc,
        gen_cntl_val = RREG32(gen_cntl_reg);
        gen_cntl_val &= ~(0xf << 8);
        gen_cntl_val |= (format << 8);
+       gen_cntl_val &= ~RADEON_CRTC_VSTAT_MODE_MASK;
        WREG32(gen_cntl_reg, gen_cntl_val);
 
        crtc_offset = (u32)base;
@@ -778,9 +779,9 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
        DRM_DEBUG_KMS("\n");
 
        if (!use_bios_divs) {
-               radeon_compute_pll(pll, mode->clock,
-                                  &freq, &feedback_div, &frac_fb_div,
-                                  &reference_div, &post_divider);
+               radeon_compute_pll_legacy(pll, mode->clock,
+                                         &freq, &feedback_div, &frac_fb_div,
+                                         &reference_div, &post_divider);
 
                for (post_div = &post_divs[0]; post_div->divider; ++post_div) {
                        if (post_div->divider == post_divider)