Merge tag 'v2.6.38' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

[mv-sheeva.git] / drivers / media / dvb / frontends / au8522_decoder.c

diff --git a/drivers/media/dvb/frontends/au8522_decoder.c b/drivers/media/dvb/frontends/au8522_decoder.c
index 6d9c5943eb3d44356c1f88089189eca5bd86f26c..b537891a4cc9d8c2e647c68eec420a1e9aaa1723 100644 (file)
--- a/drivers/media/dvb/frontends/au8522_decoder.c
+++ b/drivers/media/dvb/frontends/au8522_decoder.c
@@ -278,10 +278,18 @@ static void setup_decoder_defaults(struct au8522_state *state, u8 input_mode)
                        AU8522_TVDEC_COMB_HDIF_THR2_REG06AH_CVBS);
        au8522_writereg(state, AU8522_TVDEC_COMB_HDIF_THR3_REG06BH,
                        AU8522_TVDEC_COMB_HDIF_THR3_REG06BH_CVBS);
-       au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH,
-                       AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH_CVBS);
-       au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH,
-                       AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH_CVBS);
+       if (input_mode == AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH13 ||
+           input_mode == AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH24) {
+               au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH,
+                               AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH_SVIDEO);
+               au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH,
+                               AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH_SVIDEO);
+       } else {
+               au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH,
+                               AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH_CVBS);
+               au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH,
+                               AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH_CVBS);
+       }
        au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR3_REG06EH,
                        AU8522_TVDEC_COMB_DCDIF_THR3_REG06EH_CVBS);
        au8522_writereg(state, AU8522_TVDEC_UV_SEP_THR_REG06FH,
@@ -347,9 +355,11 @@ static void au8522_setup_cvbs_mode(struct au8522_state *state)
        au8522_writereg(state, AU8522_MODULE_CLOCK_CONTROL_REG0A3H,
                        AU8522_MODULE_CLOCK_CONTROL_REG0A3H_CVBS);
 
+       /* PGA in automatic mode */
        au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x00);
-       au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x0e);
-       au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x10);
+
+       /* Enable clamping control */
+       au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x00);
 
        au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H,
                        AU8522_INPUT_CONTROL_REG081H_CVBS_CH1);
@@ -366,14 +376,14 @@ static void au8522_setup_cvbs_tuner_mode(struct au8522_state *state)
        au8522_writereg(state, AU8522_MODULE_CLOCK_CONTROL_REG0A3H,
                        AU8522_MODULE_CLOCK_CONTROL_REG0A3H_CVBS);
 
-       /* It's not clear why they turn off the PGA before enabling the clamp
-          control, but the Windows trace does it so we will too... */
+       /* It's not clear why we have to have the PGA in automatic mode while
+          enabling clamp control, but it's what Windows does */
        au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x00);
 
        /* Enable clamping control */
        au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x0e);
 
-       /* Turn on the PGA */
+       /* Disable automatic PGA (since the CVBS is coming from the tuner) */
        au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x10);
 
        /* Set input mode to CVBS on channel 4 with SIF audio input enabled */
@@ -396,7 +406,10 @@ static void au8522_setup_svideo_mode(struct au8522_state *state)
        au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H,
                        AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH13);
 
-       /* Disable clamping control (required for S-video) */
+       /* PGA in automatic mode */
+       au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x00);
+
+       /* Enable clamping control */
        au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x00);
 
        setup_decoder_defaults(state,
@@ -410,29 +423,15 @@ static void au8522_setup_svideo_mode(struct au8522_state *state)
 
 static void disable_audio_input(struct au8522_state *state)
 {
-       /* This can probably be optimized */
        au8522_writereg(state, AU8522_AUDIO_VOLUME_L_REG0F2H, 0x00);
        au8522_writereg(state, AU8522_AUDIO_VOLUME_R_REG0F3H, 0x00);
        au8522_writereg(state, AU8522_AUDIO_VOLUME_REG0F4H, 0x00);
-       au8522_writereg(state, AU8522_I2C_CONTROL_REG1_REG091H, 0x80);
-       au8522_writereg(state, AU8522_I2C_CONTROL_REG0_REG090H, 0x84);
-
-       au8522_writereg(state, AU8522_ENA_USB_REG101H, 0x00);
-       au8522_writereg(state, AU8522_AUDIO_VOLUME_L_REG0F2H, 0x7F);
-       au8522_writereg(state, AU8522_AUDIO_VOLUME_R_REG0F3H, 0x7F);
-       au8522_writereg(state, AU8522_REG0F9H, AU8522_REG0F9H_AUDIO);
-       au8522_writereg(state, AU8522_AUDIO_MODE_REG0F1H, 0x40);
-
-       au8522_writereg(state, AU8522_GPIO_DATA_REG0E2H, 0x11);
-       msleep(5);
-       au8522_writereg(state, AU8522_GPIO_DATA_REG0E2H, 0x00);
 
        au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_1_REG0A5H, 0x04);
-       au8522_writereg(state, AU8522_AUDIOFREQ_REG606H, 0x03);
        au8522_writereg(state, AU8522_I2S_CTRL_2_REG112H, 0x02);
 
        au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H,
-                       AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS);
+                       AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_SVIDEO);
 }
 
 /* 0=disable, 1=SIF */
@@ -622,7 +621,7 @@ static int au8522_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
                return v4l2_ctrl_query_fill(qc, 0, 255, 1,
                                            AU8522_TVDEC_CONTRAST_REG00BH_CVBS);
        case V4L2_CID_BRIGHTNESS:
-               return v4l2_ctrl_query_fill(qc, 0, 255, 1, 128);
+               return v4l2_ctrl_query_fill(qc, 0, 255, 1, 109);
        case V4L2_CID_SATURATION:
                return v4l2_ctrl_query_fill(qc, 0, 255, 1, 128);
        case V4L2_CID_HUE: