Merge tag 'v2.6.38' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

[mv-sheeva.git] / drivers / net / wireless / ath / ath5k / reg.h

diff --git a/drivers/net/wireless/ath/ath5k/reg.h b/drivers/net/wireless/ath/ath5k/reg.h
index ca79ecd832fd939d645ca55e03a03eab07b58eeb..fd14b9103951710853d5f1b9057a3bfed854ae81 100644 (file)
--- a/drivers/net/wireless/ath/ath5k/reg.h
+++ b/drivers/net/wireless/ath/ath5k/reg.h
@@ -787,6 +787,7 @@
 #define        AR5K_DCU_GBL_IFS_MISC_LFSR_SLICE        0x00000007      /* LFSR Slice Select */
 #define        AR5K_DCU_GBL_IFS_MISC_TURBO_MODE        0x00000008      /* Turbo mode */
 #define        AR5K_DCU_GBL_IFS_MISC_SIFS_DUR_USEC     0x000003f0      /* SIFS Duration mask */
+#define        AR5K_DCU_GBL_IFS_MISC_SIFS_DUR_USEC_S   4
 #define        AR5K_DCU_GBL_IFS_MISC_USEC_DUR          0x000ffc00      /* USEC Duration mask */
 #define        AR5K_DCU_GBL_IFS_MISC_USEC_DUR_S        10
 #define        AR5K_DCU_GBL_IFS_MISC_DCU_ARB_DELAY     0x00300000      /* DCU Arbiter delay mask */
@@ -1063,7 +1064,7 @@
 /*
  * EEPROM command register
  */
-#define AR5K_EEPROM_CMD                0x6008                  /* Register Addres */
+#define AR5K_EEPROM_CMD                0x6008                  /* Register Address */
 #define AR5K_EEPROM_CMD_READ   0x00000001      /* EEPROM read */
 #define AR5K_EEPROM_CMD_WRITE  0x00000002      /* EEPROM write */
 #define AR5K_EEPROM_CMD_RESET  0x00000004      /* EEPROM reset */
@@ -1083,7 +1084,7 @@
 /*
  * EEPROM config register
  */
-#define AR5K_EEPROM_CFG                        0x6010                  /* Register Addres */
+#define AR5K_EEPROM_CFG                        0x6010                  /* Register Address */
 #define AR5K_EEPROM_CFG_SIZE           0x00000003              /* Size determination override */
 #define AR5K_EEPROM_CFG_SIZE_AUTO      0
 #define AR5K_EEPROM_CFG_SIZE_4KBIT     1
@@ -1125,7 +1126,7 @@
  * Second station id register (Upper 16 bits of MAC address + PCU settings)
  */
 #define AR5K_STA_ID1                   0x8004                  /* Register Address */
-#define        AR5K_STA_ID1_ADDR_U16           0x0000ffff      /* Upper 16 bits of MAC addres */
+#define        AR5K_STA_ID1_ADDR_U16           0x0000ffff      /* Upper 16 bits of MAC address */
 #define AR5K_STA_ID1_AP                        0x00010000      /* Set AP mode */
 #define AR5K_STA_ID1_ADHOC             0x00020000      /* Set Ad-Hoc mode */
 #define AR5K_STA_ID1_PWR_SV            0x00040000      /* Power save reporting */
@@ -1311,7 +1312,7 @@
 #define AR5K_IFS1_EIFS         0x03fff000
 #define AR5K_IFS1_EIFS_S       12
 #define AR5K_IFS1_CS_EN                0x04000000
-
+#define AR5K_IFS1_CS_EN_S      26
 
 /*
  * CFP duration register
@@ -2058,6 +2059,7 @@
 
 #define AR5K_PHY_SCAL                  0x9878
 #define AR5K_PHY_SCAL_32MHZ            0x0000000e
+#define        AR5K_PHY_SCAL_32MHZ_5311        0x00000008
 #define        AR5K_PHY_SCAL_32MHZ_2417        0x0000000a
 #define        AR5K_PHY_SCAL_32MHZ_HB63        0x00000032
 
@@ -2244,6 +2246,8 @@
 #define        AR5K_PHY_FRAME_CTL              (ah->ah_version == AR5K_AR5210 ? \
                                        AR5K_PHY_FRAME_CTL_5210 : AR5K_PHY_FRAME_CTL_5211)
 /*---[5111+]---*/
+#define        AR5K_PHY_FRAME_CTL_WIN_LEN      0x00000003      /* Force window length (?) */
+#define        AR5K_PHY_FRAME_CTL_WIN_LEN_S    0
 #define        AR5K_PHY_FRAME_CTL_TX_CLIP      0x00000038      /* Mask for tx clip (?) */
 #define        AR5K_PHY_FRAME_CTL_TX_CLIP_S    3
 #define        AR5K_PHY_FRAME_CTL_PREP_CHINFO  0x00010000      /* Prepend chan info */
@@ -2558,3 +2562,28 @@
  */
 #define AR5K_PHY_PDADC_TXPOWER_BASE    0xa280
 #define        AR5K_PHY_PDADC_TXPOWER(_n)      (AR5K_PHY_PDADC_TXPOWER_BASE + ((_n) << 2))
+
+/*
+ * Platform registers for WiSoC
+ */
+#define AR5K_AR5312_RESET              0xbc003020
+#define AR5K_AR5312_RESET_BB0_COLD     0x00000004
+#define AR5K_AR5312_RESET_BB1_COLD     0x00000200
+#define AR5K_AR5312_RESET_WMAC0                0x00002000
+#define AR5K_AR5312_RESET_BB0_WARM     0x00004000
+#define AR5K_AR5312_RESET_WMAC1                0x00020000
+#define AR5K_AR5312_RESET_BB1_WARM     0x00040000
+
+#define AR5K_AR5312_ENABLE             0xbc003080
+#define AR5K_AR5312_ENABLE_WLAN0    0x00000001
+#define AR5K_AR5312_ENABLE_WLAN1    0x00000008
+
+#define AR5K_AR2315_RESET              0xb1000004
+#define AR5K_AR2315_RESET_WMAC         0x00000001
+#define AR5K_AR2315_RESET_BB_WARM      0x00000002
+
+#define AR5K_AR2315_AHB_ARB_CTL                0xb1000008
+#define AR5K_AR2315_AHB_ARB_CTL_WLAN   0x00000002
+
+#define AR5K_AR2315_BYTESWAP   0xb100000c
+#define AR5K_AR2315_BYTESWAP_WMAC      0x00000002