Merge tag 'v2.6.37' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

[mv-sheeva.git] / drivers / net / wireless / ath / ath9k / ar9002_hw.c

diff --git a/drivers/net/wireless/ath/ath9k/ar9002_hw.c b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
index 303c63da5ea384b56f4eefbdb21dfb770fddda27..48261b7252d0061e5932c16a98dc3c1caf6e6245 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
@@ -371,7 +371,6 @@ static void ar9002_hw_configpcipowersave(struct ath_hw *ah,
                        REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);
 
                        REGWRITE_BUFFER_FLUSH(ah);
-                       DISABLE_REGWRITE_BUFFER(ah);
                }
 
                udelay(1000);
@@ -411,6 +410,9 @@ static void ar9002_hw_configpcipowersave(struct ath_hw *ah,
                        val &= ~(AR_WA_BIT6 | AR_WA_BIT7);
                }
 
+               if (AR_SREV_9280(ah))
+                       val |= AR_WA_BIT22;
+
                if (AR_SREV_9285E_20(ah))
                        val |= AR_WA_BIT23;
 
@@ -468,7 +470,6 @@ static int ar9002_hw_get_radiorev(struct ath_hw *ah)
                REG_WRITE(ah, AR_PHY(0x20), 0x00010000);
 
        REGWRITE_BUFFER_FLUSH(ah);
-       DISABLE_REGWRITE_BUFFER(ah);
 
        val = (REG_READ(ah, AR_PHY(256)) >> 24) & 0xff;
        val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);
@@ -569,14 +570,57 @@ void ar9002_hw_attach_ops(struct ath_hw *ah)
        ops->config_pci_powersave = ar9002_hw_configpcipowersave;
 
        ar5008_hw_attach_phy_ops(ah);
-       if (AR_SREV_9280_10_OR_LATER(ah))
+       if (AR_SREV_9280_20_OR_LATER(ah))
                ar9002_hw_attach_phy_ops(ah);
 
        ar9002_hw_attach_calib_ops(ah);
        ar9002_hw_attach_mac_ops(ah);
+}
+
+void ar9002_hw_load_ani_reg(struct ath_hw *ah, struct ath9k_channel *chan)
+{
+       u32 modesIndex;
+       int i;
 
-       if (modparam_force_new_ani)
-               ath9k_hw_attach_ani_ops_new(ah);
-       else
-               ath9k_hw_attach_ani_ops_old(ah);
+       switch (chan->chanmode) {
+       case CHANNEL_A:
+       case CHANNEL_A_HT20:
+               modesIndex = 1;
+               break;
+       case CHANNEL_A_HT40PLUS:
+       case CHANNEL_A_HT40MINUS:
+               modesIndex = 2;
+               break;
+       case CHANNEL_G:
+       case CHANNEL_G_HT20:
+       case CHANNEL_B:
+               modesIndex = 4;
+               break;
+       case CHANNEL_G_HT40PLUS:
+       case CHANNEL_G_HT40MINUS:
+               modesIndex = 3;
+               break;
+
+       default:
+               return;
+       }
+
+       ENABLE_REGWRITE_BUFFER(ah);
+
+       for (i = 0; i < ah->iniModes_9271_ANI_reg.ia_rows; i++) {
+               u32 reg = INI_RA(&ah->iniModes_9271_ANI_reg, i, 0);
+               u32 val = INI_RA(&ah->iniModes_9271_ANI_reg, i, modesIndex);
+               u32 val_orig;
+
+               if (reg == AR_PHY_CCK_DETECT) {
+                       val_orig = REG_READ(ah, reg);
+                       val &= AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK;
+                       val_orig &= ~AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK;
+
+                       REG_WRITE(ah, reg, val|val_orig);
+               } else
+                       REG_WRITE(ah, reg, val);
+       }
+
+       REGWRITE_BUFFER_FLUSH(ah);
 }