#endif
-extern int log_level;
+extern int cxt1e1_log_level;
extern int drvr_state;
FLUSH_PCI_READ ();
v = le32_to_cpu (*p);
- if (log_level >= LOG_DEBUG)
+ if (cxt1e1_log_level >= LOG_DEBUG)
pr_info("pci_read : %x = %x\n", (u_int32_t) p, v);
return v;
#else
pci_write_32 (u_int32_t *p, u_int32_t v)
{
#ifdef FLOW_DEBUG
- if (log_level >= LOG_DEBUG)
+ if (cxt1e1_log_level >= LOG_DEBUG)
pr_info("pci_write: %x = %x\n", (u_int32_t) p, v);
#endif
*p = cpu_to_le32 (v);
if (drvr_state != SBE_DRVR_AVAILABLE)
{
- if (log_level >= LOG_MONITOR)
+ if (cxt1e1_log_level >= LOG_MONITOR)
pr_warning("%s: drvr not available (%x)\n", __func__, drvr_state);
return;
}