Merge tag 'v2.6.38' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

[mv-sheeva.git] / drivers / staging / winbond / reg.c

diff --git a/drivers/staging/winbond/reg.c b/drivers/staging/winbond/reg.c
index 990f9d4bdbbd992ffac811632a2daaf7aa1241f2..1b38d6d225c9ac9e982d3478c18fe5a07347a441 100644 (file)
--- a/drivers/staging/winbond/reg.c
+++ b/drivers/staging/winbond/reg.c
@@ -1,5 +1,6 @@
-#include "sysdef.h"
-#include "wbhal_f.h"
+#include "wbhal.h"
+#include "wb35reg_f.h"
+#include "core.h"
 
 /*
  * ====================================================
@@ -1010,9 +1011,7 @@ void RFSynthesizer_initial(struct hw_data *pHwData)
        case RF_AIROHA_7230:
                /* Start to fill RF parameters, PLL_ON should be pulled low. */
                Wb35Reg_WriteSync(pHwData, 0x03dc, 0x00000000);
-               #ifdef _PE_STATE_DUMP_
-               printk("* PLL_ON    low\n");
-               #endif
+               pr_debug("* PLL_ON    low\n");
                number = ARRAY_SIZE(al7230_rf_data_24);
                Set_ChanIndep_RfData_al7230_24(pHwData, pltmp, number);
                break;
@@ -1098,9 +1097,7 @@ void RFSynthesizer_initial(struct hw_data *pHwData)
        case RF_AIROHA_7230:
                /* RF parameters have filled completely, PLL_ON should be pulled high */
                Wb35Reg_WriteSync(pHwData, 0x03dc, 0x00000080);
-               #ifdef _PE_STATE_DUMP_
-               printk("* PLL_ON    high\n");
-               #endif
+               pr_debug("* PLL_ON    high\n");
 
                /* 2.4GHz */
                ltmp = (1 << 31) | (0 << 30) | (24 << 24) | 0x9ABA8F;
@@ -1115,9 +1112,7 @@ void RFSynthesizer_initial(struct hw_data *pHwData)
 
                /* 5GHz */
                Wb35Reg_WriteSync(pHwData, 0x03dc, 0x00000000);
-               #ifdef _PE_STATE_DUMP_
-               printk("* PLL_ON    low\n");
-               #endif
+               pr_debug("* PLL_ON    low\n");
 
                number = ARRAY_SIZE(al7230_rf_data_50);
                Set_ChanIndep_RfData_al7230_50(pHwData, pltmp, number);
@@ -1127,9 +1122,7 @@ void RFSynthesizer_initial(struct hw_data *pHwData)
                msleep(5);
 
                Wb35Reg_WriteSync(pHwData, 0x03dc, 0x00000080);
-               #ifdef _PE_STATE_DUMP_
-               printk("* PLL_ON    high\n");
-               #endif
+               pr_debug("* PLL_ON    high\n");
 
                ltmp = (1 << 31) | (0 << 30) | (24 << 24) | 0x9ABA8F;
                Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
@@ -1795,9 +1788,7 @@ void RFSynthesizer_SwitchingChannel(struct hw_data *pHwData,  struct chan_info C
 
                        /* Write to register. number must less and equal than 16 */
                        Wb35Reg_BurstWrite(pHwData, 0x0864, pltmp, number, NO_INCREMENT);
-                       #ifdef _PE_STATE_DUMP_
-                       printk("Band changed\n");
-                       #endif
+                       pr_debug("Band changed\n");
                }
 
                if (Channel.band <= BAND_TYPE_OFDM_24) { /* channel 1 ~ 14 */
@@ -2073,11 +2064,7 @@ void Mxx_initial(struct hw_data *pHwData)
         */
 
        /* M00 bit set */
-       #ifdef _IBSS_BEACON_SEQ_STICK_
-       reg->M00_MacControl = 0; /* Solve beacon sequence number stop by software */
-       #else
        reg->M00_MacControl = 0x80000000; /* Solve beacon sequence number stop by hardware */
-       #endif
 
        /* M24 disable enter power save, BB RxOn and enable NAV attack */
        reg->M24_MacControl = 0x08040042;
@@ -2336,13 +2323,6 @@ void EEPROMTxVgaAdjust(struct hw_data *pHwData)
                pHwData->TxVgaFor50[32].TxVgaValue = pTxVga[17] - stmp * 2 / 4;
                pHwData->TxVgaFor50[31].TxVgaValue = pTxVga[17] - stmp * 3 / 4;
        }
-
-       #ifdef _PE_STATE_DUMP_
-       printk(" TxVgaFor24 :\n");
-       DataDmp((u8 *)pHwData->TxVgaFor24, 14 , 0);
-       printk(" TxVgaFor50 :\n");
-       DataDmp((u8 *)pHwData->TxVgaFor50, 70 , 0);
-       #endif
 }
 
 void BBProcessor_RateChanging(struct hw_data *pHwData,  u8 rate)