watchdog: w83697ug_wdt: Fix set bit 0 to activate GPIO2

[mv-sheeva.git] / drivers / watchdog / w83697ug_wdt.c

diff --git a/drivers/watchdog/w83697ug_wdt.c b/drivers/watchdog/w83697ug_wdt.c
index 883b5f79673a65026f9f129bbe22b79b31bdd652..df2a64dc9672dee584995e4b518ea5f8b0494df7 100644 (file)
--- a/drivers/watchdog/w83697ug_wdt.c
+++ b/drivers/watchdog/w83697ug_wdt.c
@@ -109,7 +109,7 @@ static int w83697ug_select_wd_register(void)
        outb_p(0x08, WDT_EFDR); /* select logical device 8 (GPIO2) */
        outb_p(0x30, WDT_EFER); /* select CR30 */
        c = inb_p(WDT_EFDR);
-       outb_p(c || 0x01, WDT_EFDR); /* set bit 0 to activate GPIO2 */
+       outb_p(c | 0x01, WDT_EFDR); /* set bit 0 to activate GPIO2 */
 
        return 0;
 }
@@ -149,8 +149,10 @@ static void wdt_ctrl(int timeout)
 {
        spin_lock(&io_lock);
 
-       if (w83697ug_select_wd_register() < 0)
+       if (w83697ug_select_wd_register() < 0) {
+               spin_unlock(&io_lock);
                return;
+       }
 
        outb_p(0xF4, WDT_EFER);    /* Select CRF4 */
        outb_p(timeout, WDT_EFDR); /* Write Timeout counter to CRF4 */