From: Dave Airlie Date: Wed, 6 Oct 2010 02:57:54 +0000 (+1000) Subject: Merge branch 'drm-radeon-next' of ../drm-radeon-next into drm-core-next X-Git-Url: https://git.karo-electronics.de/?p=mv-sheeva.git;a=commitdiff_plain;h=26bf62e47261142d528a6109fdd671a2e280b4ea Merge branch 'drm-radeon-next' of ../drm-radeon-next into drm-core-next * 'drm-radeon-next' of ../drm-radeon-next: drm/radeon/kms: add drm blit support for evergreen drm/radeon: Modify radeon_pm_in_vbl to use radeon_get_crtc_scanoutpos() drm/radeon: Add function for display scanout position query. drm/radeon/kms: rework spread spectrum handling drm/radeon/kms: remove new pll algo drm/radeon/kms: remove some pll algo flags drm/radeon/kms: prefer high post dividers in legacy pll algo drm/radeon/kms: properly handle 40 bit MC addresses in the cursor code drm/radeon: add properties to configure the width of the underscan borders drm/radeon/kms/r6xx+: use new style fencing (v3) drm/radeon/kms: enable writeback (v2) drm/radeon/kms: clean up r6xx/r7xx blit init (v2) --- 26bf62e47261142d528a6109fdd671a2e280b4ea diff --cc drivers/gpu/drm/radeon/atombios_crtc.c index 501e5286ec3,7238f3f54aa..037e3260cb7 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c @@@ -852,11 -911,29 +911,30 @@@ static void atombios_crtc_set_pll(struc encoder_mode, radeon_encoder->encoder_id, mode->clock, ref_div, fb_div, frac_fb_div, post_div); + if (ss_enabled) { + /* calculate ss amount and step size */ + if (ASIC_IS_DCE4(rdev)) { + u32 step_size; + u32 amount = (((fb_div * 10) + frac_fb_div) * ss.percentage) / 10000; + ss.amount = (amount / 10) & ATOM_PPLL_SS_AMOUNT_V2_FBDIV_MASK; + ss.amount |= ((amount - (ss.amount * 10)) << ATOM_PPLL_SS_AMOUNT_V2_NFRAC_SHIFT) & + ATOM_PPLL_SS_AMOUNT_V2_NFRAC_MASK; + if (ss.type & ATOM_PPLL_SS_TYPE_V2_CENTRE_SPREAD) + step_size = (4 * amount * ref_div * (ss.rate * 2048)) / + (125 * 25 * pll->reference_freq / 100); + else + step_size = (2 * amount * ref_div * (ss.rate * 2048)) / + (125 * 25 * pll->reference_freq / 100); + ss.step = step_size; + } + + atombios_crtc_program_ss(crtc, ATOM_ENABLE, radeon_crtc->pll_id, &ss); + } } -static int evergreen_crtc_set_base(struct drm_crtc *crtc, int x, int y, - struct drm_framebuffer *old_fb) +static int evergreen_crtc_do_set_base(struct drm_crtc *crtc, + struct drm_framebuffer *fb, + int x, int y, int atomic) { struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); struct drm_device *dev = crtc->dev;