--- /dev/null
+#include <msp430.h>
+#include <msp430xgeneric.h>
+#include <stdint.h>
+
+#include "mw_main.h"
+
+#include "mw_acc.h"
+
+void mw_init_acc_i2c(void)
+{
+ /* enable reset before configuration */
+ ACCELEROMETER_CTL1 |= UCSWRST;
+
+ /* configure as master using smclk / 40 = 399.5 kHz */
+ ACCELEROMETER_CTL0 = UCMST + UCMODE_3 + UCSYNC;
+ ACCELEROMETER_CTL1 = UCSSEL__SMCLK + UCSWRST;
+ ACCELEROMETER_BR0 = 42;
+
+ ACCELEROMETER_BR1 = 0;
+ ACCELEROMETER_I2CSA = KIONIX_DEVICE_ADDRESS;
+
+ /* release reset */
+ ACCELEROMETER_CTL1 &= ~UCSWRST;
+}
+
+/*
+ * DMA2 = SPI for LCD
+ */
+static void mw_acc_i2c_write_byte(uint8_t byte)
+{
+ ACCELEROMETER_TXBUF = byte;
+ while ((ACCELEROMETER_CTL1 & ACCELEROMETER_IFG) == 0)
+ nop();
+}
+
+/* OK this is polling write, but data is small and 400kHz I2C, it should "just work" :) */
+void mw_acc_i2c_write(const uint8_t addr, const void *data, const uint8_t len)
+{
+ int i;
+
+ if (len == 0) {
+ return;
+ }
+
+ while (UCB1STAT & UCBBUSY)
+ nop();
+
+ /*
+ * setup for write and send the start condition
+ */
+ ACCELEROMETER_IFG = 0;
+ ACCELEROMETER_CTL1 |= UCTR + UCTXSTT;
+ while (!(ACCELEROMETER_IFG & UCTXIFG))
+ nop();
+
+ /*
+ * clear transmit interrupt flag,
+ * send the register address
+ */
+ ACCELEROMETER_IFG = 0;
+
+ mw_acc_i2c_write_byte(addr);
+
+ for (i=0; i<len; i++)
+ mw_acc_i2c_write_byte(*(uint8_t *)(data+i));
+
+ while (ACCELEROMETER_CTL1 & UCTXSTP)
+ nop();
+}
+
+
--- /dev/null
+#ifndef _MW_ACC_H
+#define _MW_ACC_H
+
+#define KIONIX_DEVICE_ADDRESS ( 0x0F )
+
+/* KIONIX accelerometer register addresses */
+#define KIONIX_XOUT_HPF_L ( 0x00 )
+#define KIONIX_XOUT_HPF_H ( 0x01 )
+#define KIONIX_YOUT_HPF_L ( 0x02 )
+#define KIONIX_YOUT_HPF_H ( 0x03 )
+#define KIONIX_ZOUT_HPF_L ( 0x04 )
+#define KIONIX_ZOUT_HPF_H ( 0x05 )
+#define KIONIX_XOUT_L ( 0x06 )
+#define KIONIX_XOUT_H ( 0x07 )
+#define KIONIX_YOUT_L ( 0x08 )
+#define KIONIX_YOUT_H ( 0x09 )
+#define KIONIX_ZOUT_L ( 0x0A )
+#define KIONIX_ZOUT_H ( 0x0B )
+#define KIONIX_DCST_RESP ( 0x0C )
+#define KIONIX_WHO_AM_I ( 0x0F )
+#define KIONIX_TILT_POS_CUR ( 0x10 )
+#define KIONIX_TILT_POS_PRE ( 0x11 )
+#define KIONIX_INT_SRC_REG1 ( 0x15 )
+#define KIONIX_INT_SRC_REG2 ( 0x16 )
+#define KIONIX_STATUS_REG ( 0x18 )
+#define KIONIX_INT_REL ( 0x1A )
+#define KIONIX_CTRL_REG1 ( 0x1B )
+#define KIONIX_CTRL_REG2 ( 0x1C )
+#define KIONIX_CTRL_REG3 ( 0x1D )
+#define KIONIX_INT_CTRL_REG1 ( 0x1E )
+#define KIONIX_INT_CTRL_REG2 ( 0x1F )
+#define KIONIX_INT_CTRL_REG3 ( 0x20 )
+#define KIONIX_DATA_CTRL_REG ( 0x21 )
+#define KIONIX_TILT_TIMER ( 0x28 )
+#define KIONIX_WUF_TIMER ( 0x29 )
+#define KIONIX_TDT_TIMER ( 0x2B )
+#define KIONIX_TDT_H_THRESH ( 0x2C )
+#define KIONIX_TDT_L_THRESH ( 0x2D )
+#define KIONIX_TDT_TAP_TIMER ( 0x2E )
+#define KIONIX_TDT_TOTAL_TIMER ( 0x2F )
+#define KIONIX_TDT_LATENCY_TIMER ( 0x30 )
+#define KIONIX_TDT_WINDOW_TIMER ( 0x31 )
+#define KIONIX_SELF_TEST ( 0x3A )
+#define KIONIX_WUF_THRESH ( 0x5A )
+#define KIONIX_TILT_ANGLE ( 0x5C )
+#define KIONIX_HYST_SET ( 0x5F )
+
+/* CTRL_REG1 */
+#define PC1_STANDBY_MODE ( 0 << 7 )
+#define PC1_OPERATING_MODE ( 1 << 7 )
+#define RESOLUTION_8BIT ( 0 << 6 )
+#define RESOLUTION_12BIT ( 1 << 6 )
+#define DRDYE_DATA_AVAILABLE ( 1 << 5 )
+#define WUF_ENABLE ( 1 << 1 )
+#define TAP_ENABLE_TDTE ( 1 << 2 )
+#define TILT_ENABLE_TPE ( 1 << 0 )
+
+/* CTRL_REG2 */
+#define TILT_LEM (1 << 5 )
+#define TILT_RIM (1 << 4 )
+#define TILT_DOM (1 << 3 )
+#define TILT_UPM (1 << 2 )
+#define TILT_FDM (1 << 1 )
+#define TILT_FUM (1 << 0 )
+
+/* CTRL_REG3 */
+#define SRST ( 1 << 7 )
+#define TILT_ODR_1_6HZ ( 0 << 5 )
+#define TILT_ODR_6_3HZ ( 1 << 5 )
+#define TILT_ODR_12_5HZ ( 2 << 5 )
+#define TILT_ODR_50HZ ( 3 << 5 )
+#define DCST ( 1 << 4 )
+#define TAP_ODR_50HZ ( 0 << 2 )
+#define TAP_ODR_100HZ ( 1 << 2 )
+#define TAP_ODR_200HZ ( 2 << 2 )
+#define TAP_ODR_400HZ ( 3 << 2 )
+#define WUF_ODR_25HZ ( 0 << 0 )
+#define WUF_ODR_50HZ ( 1 << 0 )
+#define WUF_ODR_100HZ ( 2 << 0 )
+#define WUF_ODR_200HZ ( 3 << 0 )
+
+/* INT_CTRL_REG1 */
+#define IEN ( 1 << 5 )
+#define IEA ( 1 << 4 )
+#define IEL ( 1 << 3 )
+#define IEU ( 1 << 2 )
+
+/* INT_CTRL_REG2 */
+#define XBW ( 1 << 7 )
+#define YBW ( 1 << 6 )
+#define ZBW ( 1 << 5 )
+
+/* INT_CTRL_REG3 */
+#define TLEM (1 << 5)
+#define TRIM (1 << 4)
+#define TDOM (1 << 3)
+#define TUPM (1 << 2)
+#define TFDM (1 << 1)
+#define TFUM (1 << 0)
+
+/* INT_SRC_REG2 */
+#define INT_TAP_SINGLE (0x04)
+#define INT_TAP_DOUBLE (0x08)
+
+/* for readability */
+#define ONE_BYTE ( 1 )
+
+#endif
+
if ((sdata->pos == 6 && sdata->on) || sdata->pos != 6) {
if (OswaldClk.clk24hr) {
- oswald_write_character(2, 76, FONT_DROID8x12, 'x');
+ oswald_write_character(2, 76, FONT_6x9, 'x');
} else {
- oswald_write_character(2, 76, FONT_DROID8x12, '_');
+ oswald_write_character(2, 76, FONT_6x9, '_');
}
}
oswald_write_string(15, 73, FONT_DROID8x12, "24hr");
if ((sdata->pos == 7 && sdata->on) || sdata->pos != 7) {
if (OswaldClk.day_first) {
- oswald_write_character(2, 87, FONT_DROID8x12, 'x');
+ oswald_write_character(2, 86, FONT_6x9, 'x');
} else {
- oswald_write_character(2, 87, FONT_DROID8x12, '_');
+ oswald_write_character(2, 86, FONT_6x9, '_');
}
}
oswald_write_string(15, 83, FONT_DROID8x12, "dd.mm. mm/dd");