2 * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
4 * SPDX-License-Identifier: GPL-2.0+
8 #include <clk-uclass.h>
11 DECLARE_GLOBAL_DATA_PTR;
13 struct clk_fixed_rate {
14 unsigned long fixed_rate;
17 #define to_clk_fixed_rate(dev) ((struct clk_fixed_rate *)dev_get_platdata(dev))
19 static ulong clk_fixed_rate_get_rate(struct clk *clk)
24 return to_clk_fixed_rate(clk->dev)->fixed_rate;
27 const struct clk_ops clk_fixed_rate_ops = {
28 .get_rate = clk_fixed_rate_get_rate,
31 static int clk_fixed_rate_ofdata_to_platdata(struct udevice *dev)
33 to_clk_fixed_rate(dev)->fixed_rate =
34 fdtdec_get_int(gd->fdt_blob, dev->of_offset,
35 "clock-frequency", 0);
40 static const struct udevice_id clk_fixed_rate_match[] = {
42 .compatible = "fixed-clock",
47 U_BOOT_DRIVER(clk_fixed_rate) = {
48 .name = "fixed_rate_clock",
50 .of_match = clk_fixed_rate_match,
51 .ofdata_to_platdata = clk_fixed_rate_ofdata_to_platdata,
52 .platdata_auto_alloc_size = sizeof(struct clk_fixed_rate),
53 .ops = &clk_fixed_rate_ops,