2 * Copyright 2015 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
14 #ifdef CONFIG_SYS_FSL_SRK_LE
15 #define srk_in32(a) in_le32(a)
17 #define srk_in32(a) in_be32(a)
20 #ifdef CONFIG_SYS_FSL_SFP_LE
21 #define sfp_in32(a) in_le32(a)
22 #define sfp_out32(a, v) out_le32(a, v)
23 #define sfp_in16(a) in_le16(a)
24 #elif defined(CONFIG_SYS_FSL_SFP_BE)
25 #define sfp_in32(a) in_be32(a)
26 #define sfp_out32(a, v) out_be32(a, v)
27 #define sfp_in16(a) in_be16(a)
29 #error Neither CONFIG_SYS_FSL_SFP_LE nor CONFIG_SYS_FSL_SFP_BE is defined
32 /* Number of SRKH registers */
33 #define NUM_SRKH_REGS 8
35 #ifdef CONFIG_SYS_FSL_SFP_VER_3_2
36 struct ccsr_sfp_regs {
38 u32 ospr1; /* 0x204 */
40 u32 fswpr; /* 0x218 FSL Section Write Protect */
41 u32 fsl_uid; /* 0x21c FSL UID 0 */
42 u32 fsl_uid_1; /* 0x220 FSL UID 0 */
44 u32 srk_hash[8]; /* 0x254 Super Root Key Hash */
45 u32 oem_uid; /* 0x274 OEM UID 0*/
46 u32 oem_uid_1; /* 0x278 OEM UID 1*/
47 u32 oem_uid_2; /* 0x27c OEM UID 2*/
48 u32 oem_uid_3; /* 0x280 OEM UID 3*/
49 u32 oem_uid_4; /* 0x284 OEM UID 4*/
52 #elif defined(CONFIG_SYS_FSL_SFP_VER_3_0)
53 struct ccsr_sfp_regs {
56 u32 srk_hash[NUM_SRKH_REGS]; /* 0x23c Super Root Key Hash */
57 u32 oem_uid; /* 0x9c OEM Unique ID */
59 u32 ovpr; /* 0xA4 Intent To Secure */
61 u32 fsl_uid; /* 0xB0 FSL Unique ID */
63 u32 fsl_spfr0; /* Scratch Pad Fuse Register 0 */
64 u32 fsl_spfr1; /* Scratch Pad Fuse Register 1 */
68 struct ccsr_sfp_regs {
70 u32 ospr; /* 0x40 OEM Security Policy Register */
72 u32 srk_hash[8]; /* 0x7c Super Root Key Hash */
73 u32 oem_uid; /* 0x9c OEM Unique ID */
75 u32 ovpr; /* 0xA4 OEM Validation Policy Register */
77 u32 fsl_uid; /* 0xB0 FSL Unique ID */
80 #define ITS_MASK 0x00000004
82 #define OSPR_KEY_REVOC_SHIFT 13
83 #define OSPR_KEY_REVOC_MASK 0x0000e000