drm: add support for pixel clock and DE polarity control via DT

[karo-tx-linux.git] / drivers / gpu / drm / atmel-hlcdc / atmel_hlcdc_crtc.c

diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
index f69b92535505b5ae1c899d6f9b08f76501851fa7..291ddbd9a9980935338a39385ae265687eb81e0f 100644 (file)
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
@@ -100,6 +100,9 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c)
 
        cfg |= ATMEL_HLCDC_CLKDIV(div);
 
+       if (adj->flags & DRM_MODE_FLAG_POL_PIXDATA_NEGEDGE)
+               cfg |= ATMEL_HLCDC_CLKPOL;
+
        regmap_update_bits(regmap, ATMEL_HLCDC_CFG(0),
                           ATMEL_HLCDC_CLKSEL | ATMEL_HLCDC_CLKDIV_MASK |
                           ATMEL_HLCDC_CLKPOL, cfg);
@@ -112,6 +115,9 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c)
        if (adj->flags & DRM_MODE_FLAG_NHSYNC)
                cfg |= ATMEL_HLCDC_HSPOL;
 
+       if (adj->flags & DRM_MODE_FLAG_POL_DE_LOW)
+               cfg |= ATMEL_HLCDC_DISPPOL;
+
        regmap_update_bits(regmap, ATMEL_HLCDC_CFG(5),
                           ATMEL_HLCDC_HSPOL | ATMEL_HLCDC_VSPOL |
                           ATMEL_HLCDC_VSPDLYS | ATMEL_HLCDC_VSPDLYE |