drm: add support for pixel clock and DE polarity control via DT

diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
index f69b92535505b5ae1c899d6f9b08f76501851fa7..291ddbd9a9980935338a39385ae265687eb81e0f 100644 (file)
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
@@ -100,6 +100,9 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c)
 
        cfg |= ATMEL_HLCDC_CLKDIV(div);
 
+       if (adj->flags & DRM_MODE_FLAG_POL_PIXDATA_NEGEDGE)
+               cfg |= ATMEL_HLCDC_CLKPOL;
+
        regmap_update_bits(regmap, ATMEL_HLCDC_CFG(0),
                           ATMEL_HLCDC_CLKSEL | ATMEL_HLCDC_CLKDIV_MASK |
                           ATMEL_HLCDC_CLKPOL, cfg);
@@ -112,6 +115,9 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c)
        if (adj->flags & DRM_MODE_FLAG_NHSYNC)
                cfg |= ATMEL_HLCDC_HSPOL;
 
+       if (adj->flags & DRM_MODE_FLAG_POL_DE_LOW)
+               cfg |= ATMEL_HLCDC_DISPPOL;
+
        regmap_update_bits(regmap, ATMEL_HLCDC_CFG(5),
                           ATMEL_HLCDC_HSPOL | ATMEL_HLCDC_VSPOL |
                           ATMEL_HLCDC_VSPDLYS | ATMEL_HLCDC_VSPDLYE |

diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 213b11ea69b5b7ecc6309cdbde007d46e0319144..649b98c8172532e3f7f528c5cace5356dc2c0a36 100644 (file)
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -611,6 +611,14 @@ void drm_display_mode_from_videomode(const struct videomode *vm,
                dmode->flags |= DRM_MODE_FLAG_DBLSCAN;
        if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
                dmode->flags |= DRM_MODE_FLAG_DBLCLK;
+       if (vm->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE)
+               dmode->flags |= DRM_MODE_FLAG_POL_PIXDATA_POSEDGE;
+       if (vm->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
+               dmode->flags |= DRM_MODE_FLAG_POL_PIXDATA_NEGEDGE;
+       if (vm->flags & DISPLAY_FLAGS_DE_LOW)
+               dmode->flags |= DRM_MODE_FLAG_POL_DE_LOW;
+       if (vm->flags & DISPLAY_FLAGS_DE_HIGH)
+               dmode->flags |= DRM_MODE_FLAG_POL_DE_HIGH;
        drm_mode_set_name(dmode);
 }
 EXPORT_SYMBOL_GPL(drm_display_mode_from_videomode);
@@ -652,6 +660,14 @@ void drm_display_mode_to_videomode(const struct drm_display_mode *dmode,
                vm->flags |= DISPLAY_FLAGS_DOUBLESCAN;
        if (dmode->flags & DRM_MODE_FLAG_DBLCLK)
                vm->flags |= DISPLAY_FLAGS_DOUBLECLK;
+       if (dmode->flags & DRM_MODE_FLAG_POL_PIXDATA_POSEDGE)
+               vm->flags |= DISPLAY_FLAGS_PIXDATA_POSEDGE;
+       if (dmode->flags & DRM_MODE_FLAG_POL_PIXDATA_NEGEDGE)
+               vm->flags |= DISPLAY_FLAGS_PIXDATA_NEGEDGE;
+       if (dmode->flags & DRM_MODE_FLAG_POL_DE_LOW)
+               vm->flags |= DISPLAY_FLAGS_DE_LOW;
+       if (dmode->flags & DRM_MODE_FLAG_POL_DE_HIGH)
+               vm->flags |= DISPLAY_FLAGS_DE_HIGH;
 }
 EXPORT_SYMBOL_GPL(drm_display_mode_to_videomode);
 

diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index dbeba949462a60613e3f75b49b74d13c73471134..2a5d760a899f97eee989888e7abd88e7025b7c06 100644 (file)
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -73,6 +73,13 @@
 #define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM       (7<<14)
 #define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF    (8<<14)
 
+#define DRM_MODE_FLAG_POL_PIXDATA_NEGEDGE      BIT(20)
+#define DRM_MODE_FLAG_POL_PIXDATA_POSEDGE      BIT(21)
+#define DRM_MODE_FLAG_POL_PIXDATA_PRESERVE     BIT(22)
+#define DRM_MODE_FLAG_POL_DE_LOW               BIT(23)
+#define DRM_MODE_FLAG_POL_DE_HIGH              BIT(24)
+#define DRM_MODE_FLAG_POL_DE_PRESERVE          BIT(25)
+
 
 /* DPMS flags */
 /* bit compatible with the xorg definitions. */