drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

   1 /*
   2  * Copyright (C) 2014 Traphandler
   3  * Copyright (C) 2014 Free Electrons
   4  *
   5  * Author: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
   6  * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License version 2 as published by
  10  * the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program.  If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include <linux/clk.h>
  22 #include <linux/pm.h>
  23 #include <linux/pm_runtime.h>
  24 #include <linux/pinctrl/consumer.h>
  25
  26 #include <drm/drm_crtc.h>
  27 #include <drm/drm_crtc_helper.h>
  28 #include <drm/drmP.h>
  29
  30 #include <video/videomode.h>
  31
  32 #include "atmel_hlcdc_dc.h"
  33
  34 /**
  35  * Atmel HLCDC CRTC structure
  36  *
  37  * @base: base DRM CRTC structure
  38  * @hlcdc: pointer to the atmel_hlcdc structure provided by the MFD device
  39  * @event: pointer to the current page flip event
  40  * @id: CRTC id (returned by drm_crtc_index)
  41  * @enabled: CRTC state
  42  */
  43 struct atmel_hlcdc_crtc {
  44         struct drm_crtc base;
  45         struct atmel_hlcdc_dc *dc;
  46         struct drm_pending_vblank_event *event;
  47         int id;
  48         bool enabled;
  49 };
  50
  51 static inline struct atmel_hlcdc_crtc *
  52 drm_crtc_to_atmel_hlcdc_crtc(struct drm_crtc *crtc)
  53 {
  54         return container_of(crtc, struct atmel_hlcdc_crtc, base);
  55 }
  56
  57 static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c)
  58 {
  59         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
  60         struct regmap *regmap = crtc->dc->hlcdc->regmap;
  61         struct drm_display_mode *adj = &c->state->adjusted_mode;
  62         unsigned long mode_rate;
  63         struct videomode vm;
  64         unsigned long prate;
  65         unsigned int cfg;
  66         int div;
  67
  68         vm.vfront_porch = adj->crtc_vsync_start - adj->crtc_vdisplay;
  69         vm.vback_porch = adj->crtc_vtotal - adj->crtc_vsync_end;
  70         vm.vsync_len = adj->crtc_vsync_end - adj->crtc_vsync_start;
  71         vm.hfront_porch = adj->crtc_hsync_start - adj->crtc_hdisplay;
  72         vm.hback_porch = adj->crtc_htotal - adj->crtc_hsync_end;
  73         vm.hsync_len = adj->crtc_hsync_end - adj->crtc_hsync_start;
  74
  75         regmap_write(regmap, ATMEL_HLCDC_CFG(1),
  76                      (vm.hsync_len - 1) | ((vm.vsync_len - 1) << 16));
  77
  78         regmap_write(regmap, ATMEL_HLCDC_CFG(2),
  79                      (vm.vfront_porch - 1) | (vm.vback_porch << 16));
  80
  81         regmap_write(regmap, ATMEL_HLCDC_CFG(3),
  82                      (vm.hfront_porch - 1) | ((vm.hback_porch - 1) << 16));
  83
  84         regmap_write(regmap, ATMEL_HLCDC_CFG(4),
  85                      (adj->crtc_hdisplay - 1) |
  86                      ((adj->crtc_vdisplay - 1) << 16));
  87
  88         cfg = 0;
  89
  90         prate = clk_get_rate(crtc->dc->hlcdc->sys_clk);
  91         mode_rate = adj->crtc_clock * 1000;
  92         if ((prate / 2) < mode_rate) {
  93                 prate *= 2;
  94                 cfg |= ATMEL_HLCDC_CLKSEL;
  95         }
  96
  97         div = DIV_ROUND_UP(prate, mode_rate);
  98         if (div < 2)
  99                 div = 2;
 100
 101         cfg |= ATMEL_HLCDC_CLKDIV(div);
 102
 103         if (adj->flags & DRM_MODE_FLAG_POL_PIXDATA_NEGEDGE)
 104                 cfg |= ATMEL_HLCDC_CLKPOL;
 105
 106         regmap_update_bits(regmap, ATMEL_HLCDC_CFG(0),
 107                            ATMEL_HLCDC_CLKSEL | ATMEL_HLCDC_CLKDIV_MASK |
 108                            ATMEL_HLCDC_CLKPOL, cfg);
 109
 110         cfg = 0;
 111
 112         if (adj->flags & DRM_MODE_FLAG_NVSYNC)
 113                 cfg |= ATMEL_HLCDC_VSPOL;
 114
 115         if (adj->flags & DRM_MODE_FLAG_NHSYNC)
 116                 cfg |= ATMEL_HLCDC_HSPOL;
 117
 118         if (adj->flags & DRM_MODE_FLAG_POL_DE_LOW)
 119                 cfg |= ATMEL_HLCDC_DISPPOL;
 120
 121         regmap_update_bits(regmap, ATMEL_HLCDC_CFG(5),
 122                            ATMEL_HLCDC_HSPOL | ATMEL_HLCDC_VSPOL |
 123                            ATMEL_HLCDC_VSPDLYS | ATMEL_HLCDC_VSPDLYE |
 124                            ATMEL_HLCDC_DISPPOL | ATMEL_HLCDC_DISPDLY |
 125                            ATMEL_HLCDC_VSPSU | ATMEL_HLCDC_VSPHO |
 126                            ATMEL_HLCDC_GUARDTIME_MASK,
 127                            cfg);
 128 }
 129
 130 static bool atmel_hlcdc_crtc_mode_fixup(struct drm_crtc *crtc,
 131                                         const struct drm_display_mode *mode,
 132                                         struct drm_display_mode *adjusted_mode)
 133 {
 134         return true;
 135 }
 136
 137 static void atmel_hlcdc_crtc_disable(struct drm_crtc *c)
 138 {
 139         struct drm_device *dev = c->dev;
 140         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 141         struct regmap *regmap = crtc->dc->hlcdc->regmap;
 142         unsigned int status;
 143
 144         if (!crtc->enabled)
 145                 return;
 146
 147         drm_crtc_vblank_off(c);
 148
 149         pm_runtime_get_sync(dev->dev);
 150
 151         regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_DISP);
 152         while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
 153                (status & ATMEL_HLCDC_DISP))
 154                 cpu_relax();
 155
 156         regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_SYNC);
 157         while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
 158                (status & ATMEL_HLCDC_SYNC))
 159                 cpu_relax();
 160
 161         regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_PIXEL_CLK);
 162         while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
 163                (status & ATMEL_HLCDC_PIXEL_CLK))
 164                 cpu_relax();
 165
 166         clk_disable_unprepare(crtc->dc->hlcdc->sys_clk);
 167         pinctrl_pm_select_sleep_state(dev->dev);
 168
 169         pm_runtime_allow(dev->dev);
 170
 171         pm_runtime_put_sync(dev->dev);
 172
 173         crtc->enabled = false;
 174 }
 175
 176 static void atmel_hlcdc_crtc_enable(struct drm_crtc *c)
 177 {
 178         struct drm_device *dev = c->dev;
 179         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 180         struct regmap *regmap = crtc->dc->hlcdc->regmap;
 181         unsigned int status;
 182
 183         if (crtc->enabled)
 184                 return;
 185
 186         pm_runtime_get_sync(dev->dev);
 187
 188         pm_runtime_forbid(dev->dev);
 189
 190         pinctrl_pm_select_default_state(dev->dev);
 191         clk_prepare_enable(crtc->dc->hlcdc->sys_clk);
 192
 193         regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_PIXEL_CLK);
 194         while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
 195                !(status & ATMEL_HLCDC_PIXEL_CLK))
 196                 cpu_relax();
 197
 198
 199         regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_SYNC);
 200         while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
 201                !(status & ATMEL_HLCDC_SYNC))
 202                 cpu_relax();
 203
 204         regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_DISP);
 205         while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
 206                !(status & ATMEL_HLCDC_DISP))
 207                 cpu_relax();
 208
 209         pm_runtime_put_sync(dev->dev);
 210
 211         drm_crtc_vblank_on(c);
 212
 213         crtc->enabled = true;
 214 }
 215
 216 void atmel_hlcdc_crtc_suspend(struct drm_crtc *c)
 217 {
 218         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 219
 220         if (crtc->enabled) {
 221                 atmel_hlcdc_crtc_disable(c);
 222                 /* save enable state for resume */
 223                 crtc->enabled = true;
 224         }
 225 }
 226
 227 void atmel_hlcdc_crtc_resume(struct drm_crtc *c)
 228 {
 229         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 230
 231         if (crtc->enabled) {
 232                 crtc->enabled = false;
 233                 atmel_hlcdc_crtc_enable(c);
 234         }
 235 }
 236
 237 static int atmel_hlcdc_crtc_atomic_check(struct drm_crtc *c,
 238                                          struct drm_crtc_state *s)
 239 {
 240         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 241
 242         if (atmel_hlcdc_dc_mode_valid(crtc->dc, &s->adjusted_mode) != MODE_OK)
 243                 return -EINVAL;
 244
 245         return atmel_hlcdc_plane_prepare_disc_area(s);
 246 }
 247
 248 static void atmel_hlcdc_crtc_atomic_begin(struct drm_crtc *c)
 249 {
 250         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 251
 252         if (c->state->event) {
 253                 c->state->event->pipe = drm_crtc_index(c);
 254
 255                 WARN_ON(drm_crtc_vblank_get(c) != 0);
 256
 257                 crtc->event = c->state->event;
 258                 c->state->event = NULL;
 259         }
 260 }
 261
 262 static void atmel_hlcdc_crtc_atomic_flush(struct drm_crtc *crtc)
 263 {
 264         /* TODO: write common plane control register if available */
 265 }
 266
 267 static const struct drm_crtc_helper_funcs lcdc_crtc_helper_funcs = {
 268         .mode_fixup = atmel_hlcdc_crtc_mode_fixup,
 269         .mode_set = drm_helper_crtc_mode_set,
 270         .mode_set_nofb = atmel_hlcdc_crtc_mode_set_nofb,
 271         .mode_set_base = drm_helper_crtc_mode_set_base,
 272         .disable = atmel_hlcdc_crtc_disable,
 273         .enable = atmel_hlcdc_crtc_enable,
 274         .atomic_check = atmel_hlcdc_crtc_atomic_check,
 275         .atomic_begin = atmel_hlcdc_crtc_atomic_begin,
 276         .atomic_flush = atmel_hlcdc_crtc_atomic_flush,
 277 };
 278
 279 static void atmel_hlcdc_crtc_destroy(struct drm_crtc *c)
 280 {
 281         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 282
 283         drm_crtc_cleanup(c);
 284         kfree(crtc);
 285 }
 286
 287 void atmel_hlcdc_crtc_cancel_page_flip(struct drm_crtc *c,
 288                                        struct drm_file *file)
 289 {
 290         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 291         struct drm_pending_vblank_event *event;
 292         struct drm_device *dev = c->dev;
 293         unsigned long flags;
 294
 295         spin_lock_irqsave(&dev->event_lock, flags);
 296         event = crtc->event;
 297         if (event && event->base.file_priv == file) {
 298                 event->base.destroy(&event->base);
 299                 drm_vblank_put(dev, crtc->id);
 300                 crtc->event = NULL;
 301         }
 302         spin_unlock_irqrestore(&dev->event_lock, flags);
 303 }
 304
 305 static void atmel_hlcdc_crtc_finish_page_flip(struct atmel_hlcdc_crtc *crtc)
 306 {
 307         struct drm_device *dev = crtc->base.dev;
 308         unsigned long flags;
 309
 310         spin_lock_irqsave(&dev->event_lock, flags);
 311         if (crtc->event) {
 312                 drm_send_vblank_event(dev, crtc->id, crtc->event);
 313                 drm_vblank_put(dev, crtc->id);
 314                 crtc->event = NULL;
 315         }
 316         spin_unlock_irqrestore(&dev->event_lock, flags);
 317 }
 318
 319 void atmel_hlcdc_crtc_irq(struct drm_crtc *c)
 320 {
 321         drm_handle_vblank(c->dev, 0);
 322         atmel_hlcdc_crtc_finish_page_flip(drm_crtc_to_atmel_hlcdc_crtc(c));
 323 }
 324
 325 static const struct drm_crtc_funcs atmel_hlcdc_crtc_funcs = {
 326         .page_flip = drm_atomic_helper_page_flip,
 327         .set_config = drm_atomic_helper_set_config,
 328         .destroy = atmel_hlcdc_crtc_destroy,
 329         .reset = drm_atomic_helper_crtc_reset,
 330         .atomic_duplicate_state =  drm_atomic_helper_crtc_duplicate_state,
 331         .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
 332 };
 333
 334 int atmel_hlcdc_crtc_create(struct drm_device *dev)
 335 {
 336         struct atmel_hlcdc_dc *dc = dev->dev_private;
 337         struct atmel_hlcdc_planes *planes = dc->planes;
 338         struct atmel_hlcdc_crtc *crtc;
 339         int ret;
 340         int i;
 341
 342         crtc = kzalloc(sizeof(*crtc), GFP_KERNEL);
 343         if (!crtc)
 344                 return -ENOMEM;
 345
 346         crtc->dc = dc;
 347
 348         ret = drm_crtc_init_with_planes(dev, &crtc->base,
 349                                 &planes->primary->base,
 350                                 planes->cursor ? &planes->cursor->base : NULL,
 351                                 &atmel_hlcdc_crtc_funcs);
 352         if (ret < 0)
 353                 goto fail;
 354
 355         crtc->id = drm_crtc_index(&crtc->base);
 356
 357         if (planes->cursor)
 358                 planes->cursor->base.possible_crtcs = 1 << crtc->id;
 359
 360         for (i = 0; i < planes->noverlays; i++)
 361                 planes->overlays[i]->base.possible_crtcs = 1 << crtc->id;
 362
 363         drm_crtc_helper_add(&crtc->base, &lcdc_crtc_helper_funcs);
 364
 365         dc->crtc = &crtc->base;
 366
 367         return 0;
 368
 369 fail:
 370         atmel_hlcdc_crtc_destroy(&crtc->base);
 371         return ret;
 372 }
 373