#define AVIC_INTTYPEL REG32_PTR(AVIC_BASE_ADDR + (0x1C))
/* L210 */
-#define L2CC_BASE_ADDR 0x30000000
#define L2_CACHE_LINE_SIZE 32
#define L2_CACHE_CTL_REG 0x100
#define L2_CACHE_AUX_CTL_REG 0x104
#define L2_CACHE_SYNC_REG 0x730
#define L2_CACHE_INV_LINE_REG 0x770
#define L2_CACHE_INV_WAY_REG 0x77C
-#define L2_CACHE_CLEAN_LINE_REG 0x7B0
-#define L2_CACHE_CLEAN_INV_LINE_REG 0x7F0
+#define L2_CACHE_CLEAN_LINE_PA_REG 0x7B0
+#define L2_CACHE_CLEAN_LINE_WAY_REG 0x7B8
+#define L2_CACHE_CLEAN_WAY_REG 0x7BC
+#define L2_CACHE_CLEAN_INV_LINE_PA_REG 0x7F0
+#define L2_CACHE_CLEAN_INV_LINE_WAY_REG 0x7F8
+#define L2_CACHE_CLEAN_INV_WAY_REG 0x7FC
/* SPBA */
#define SPBA_IOMUX 0x30
/* UPCTL PD MFD MFI MFN */
#define UPCTL_PARAM_288 (((1-1) << 26) + ((13-1) << 16) + (5 << 10) + (7 << 0))
-
+
#define PDR0_399_133_66 0xFF800550 /* ARM=399MHz, HCLK=133MHz, IPG=66.5MHz */
#define PDR0_399_100_50 0xFF800458 /* ARM=399MHz, HCLK=100MHz, IPG=50MHz */
#define PDR0_399_66_66 0xFF800328 /* ARM=399MHz, HCLK=IPG=66.5MHz */
#define NAND_FLASH_CONFIG2_FCMD_EN (1 << 0)
#define FDO_PAGE_SPARE_VAL 0x8
-#define MXC_NAND_BASE_DUMMY 0xE0000000
-#define NOR_FLASH_BOOT 0
-#define NAND_FLASH_BOOT 0x10000000
-#define SDRAM_NON_FLASH_BOOT 0x20000000
+#define NOR_FLASH_BOOT 0
+#define NAND_FLASH_BOOT 0x10000000
+#define SDRAM_NON_FLASH_BOOT 0x20000000
+#define MMC_BOOT 0x40000000
#define MXCBOOT_FLAG_REG (AVIC_BASE_ADDR + 0x100)
+
#define MXCFIS_NOTHING 0x00000000
#define MXCFIS_NAND 0x10000000
#define MXCFIS_NOR 0x20000000
+#define MXCFIS_MMC 0x40000000
#define MXCFIS_FLAG_REG (AVIC_BASE_ADDR + 0x104)
#define IS_BOOTING_FROM_NAND() (readl(MXCBOOT_FLAG_REG) == NAND_FLASH_BOOT)
#define IS_BOOTING_FROM_NOR() (readl(MXCBOOT_FLAG_REG) == NOR_FLASH_BOOT)
-#define IS_BOOTING_FROM_SDRAM() (readl(MXCBOOT_FLAG_REG) == SDRAM_NON_FLASH_BOOT)
+#define IS_BOOTING_FROM_SDRAM() (readl(MXCBOOT_FLAG_REG) == SDRAM_NON_FLASH_BOOT)
+#define IS_BOOTING_FROM_MMC() (readl(MXCBOOT_FLAG_REG) == MMC_BOOT)
#ifndef MXCFLASH_SELECT_NAND
#define IS_FIS_FROM_NAND() 0
#ifndef MXCFLASH_SELECT_NOR
#define IS_FIS_FROM_NOR() 0
#else
-#define IS_FIS_FROM_NOR() (!IS_FIS_FROM_NAND())
+#define IS_FIS_FROM_NOR() (readl(MXCFIS_FLAG_REG) == MXCFIS_NOR)
#endif
-#define MXC_ASSERT_NOR_BOOT() writel(MXCFIS_NOR, MXCFIS_FLAG_REG)
-#define MXC_ASSERT_NAND_BOOT() writel(MXCFIS_NAND, MXCFIS_FLAG_REG)
+#ifndef MXCFLASH_SELECT_MMC
+#define IS_FIS_FROM_MMC() 0
+#else
+#define IS_FIS_FROM_MMC() (readl(MXCFIS_FLAG_REG) == MXCFIS_MMC)
+#endif
+
+#define MXC_ASSERT_NOR_BOOT() writel(MXCFIS_NOR, MXCFIS_FLAG_REG)
+#define MXC_ASSERT_NAND_BOOT() writel(MXCFIS_NAND, MXCFIS_FLAG_REG)
+#define MXC_ASSERT_MMC_BOOT() writel(MXCFIS_MMC, MXCFIS_FLAG_REG)
/*
* This macro is used to get certain bit field from a number
unsigned int get_peri_clock(enum peri_clocks clk);
-enum {
- MXC_NFC_V1,
- MXC_NFC_V2,
-};
-
-typedef unsigned int nfc_setup_func_t(unsigned int, unsigned int, unsigned int);
+typedef unsigned int nfc_setup_func_t(unsigned int, unsigned int, unsigned int, unsigned int);
#endif //#if !defined(__ASSEMBLER__)