arch/arm/boot/dts/imx53-tx53.dtsi

   1 /*
   2  * Copyright 2012-2017 <LW@KARO-electronics.de>
   3  * based on imx53-qsb.dts
   4  *   Copyright 2011 Freescale Semiconductor, Inc.
   5  *   Copyright 2011 Linaro Ltd.
   6  *
   7  * This file is dual-licensed: you can use it either under the terms
   8  * of the GPL or the X11 license, at your option. Note that this dual
   9  * licensing only applies to this file, and not this project as a
  10  * whole.
  11  *
  12  *  a) This file is free software; you can redistribute it and/or
  13  *     modify it under the terms of the GNU General Public License
  14  *     version 2 as published by the Free Software Foundation.
  15  *
  16  *     This file is distributed in the hope that it will be useful,
  17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *     GNU General Public License for more details.
  20  *
  21  * Or, alternatively,
  22  *
  23  *  b) Permission is hereby granted, free of charge, to any person
  24  *     obtaining a copy of this software and associated documentation
  25  *     files (the "Software"), to deal in the Software without
  26  *     restriction, including without limitation the rights to use,
  27  *     copy, modify, merge, publish, distribute, sublicense, and/or
  28  *     sell copies of the Software, and to permit persons to whom the
  29  *     Software is furnished to do so, subject to the following
  30  *     conditions:
  31  *
  32  *     The above copyright notice and this permission notice shall be
  33  *     included in all copies or substantial portions of the Software.
  34  *
  35  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  42  *     OTHER DEALINGS IN THE SOFTWARE.
  43  */
  44
  45 #include "imx53.dtsi"
  46 #include <dt-bindings/gpio/gpio.h>
  47
  48 / {
  49         model = "Ka-Ro electronics TX53 module";
  50         compatible = "karo,tx53", "fsl,imx53";
  51
  52         aliases {
  53                 can0 = &can2; /* Make the can interface indices consistent with TX28/TX48 modules */
  54                 can1 = &can1;
  55                 ipu = &ipu;
  56                 reg_can_xcvr = &reg_can_xcvr;
  57                 usbh1 = &usbh1;
  58                 usbotg = &usbotg;
  59         };
  60
  61         clocks {
  62                 ckih1 {
  63                         clock-frequency = <0>;
  64                 };
  65
  66                 mclk: clock@0 {
  67                         compatible = "fixed-clock";
  68                         reg = <0>;
  69                         #clock-cells = <0>;
  70                         clock-frequency = <26000000>;
  71                 };
  72         };
  73
  74         gpio-keys {
  75                 compatible = "gpio-keys";
  76                 pinctrl-names = "default";
  77                 pinctrl-0 = <&pinctrl_gpio_key>;
  78
  79                 power {
  80                         label = "Power Button";
  81                         gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
  82                         linux,code = <116>; /* KEY_POWER */
  83                         wakeup-source;
  84                 };
  85         };
  86
  87         leds {
  88                 compatible = "gpio-leds";
  89                 pinctrl-names = "default";
  90                 pinctrl-0 = <&pinctrl_stk5led>;
  91
  92                 user {
  93                         label = "Heartbeat";
  94                         gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
  95                         linux,default-trigger = "heartbeat";
  96                 };
  97         };
  98
  99         reg_2v5: regulator-2v5 {
 100                 compatible = "regulator-fixed";
 101                 regulator-name = "2V5";
 102                 regulator-min-microvolt = <2500000>;
 103                 regulator-max-microvolt = <2500000>;
 104         };
 105
 106         reg_3v3: regulator-3v3 {
 107                 compatible = "regulator-fixed";
 108                 regulator-name = "3V3";
 109                 regulator-min-microvolt = <3300000>;
 110                 regulator-max-microvolt = <3300000>;
 111         };
 112
 113         reg_can_xcvr: regulator-can-xcvr {
 114                 compatible = "regulator-fixed";
 115                 regulator-name = "CAN XCVR";
 116                 regulator-min-microvolt = <3300000>;
 117                 regulator-max-microvolt = <3300000>;
 118                 pinctrl-names = "default";
 119                 pinctrl-0 = <&pinctrl_can_xcvr>;
 120                 gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
 121         };
 122
 123         reg_usbh1_vbus: regulator-usbh1-vbus {
 124                 compatible = "regulator-fixed";
 125                 regulator-name = "usbh1_vbus";
 126                 regulator-min-microvolt = <5000000>;
 127                 regulator-max-microvolt = <5000000>;
 128                 pinctrl-names = "default";
 129                 pinctrl-0 = <&pinctrl_usbh1_vbus>;
 130                 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
 131                 enable-active-high;
 132         };
 133
 134         reg_usbotg_vbus: regulator-usbotg-vbus {
 135                 compatible = "regulator-fixed";
 136                 regulator-name = "usbotg_vbus";
 137                 regulator-min-microvolt = <5000000>;
 138                 regulator-max-microvolt = <5000000>;
 139                 pinctrl-names = "default";
 140                 pinctrl-0 = <&pinctrl_usbotg_vbus>;
 141                 gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
 142                 enable-active-high;
 143         };
 144
 145         sound {
 146                 compatible = "karo,tx53-audio-sgtl5000", "fsl,imx-audio-sgtl5000";
 147                 model = "tx53-audio-sgtl5000";
 148                 ssi-controller = <&ssi1>;
 149                 audio-codec = <&sgtl5000>;
 150                 audio-routing =
 151                         "MIC_IN", "Mic Jack",
 152                         "Mic Jack", "Mic Bias",
 153                         "Headphone Jack", "HP_OUT";
 154                 /* '1' based port numbers according to datasheet names */
 155                 mux-int-port = <1>;
 156                 mux-ext-port = <5>;
 157         };
 158 };
 159
 160 &audmux {
 161         pinctrl-names = "default";
 162         pinctrl-0 = <&pinctrl_ssi1>;
 163         status = "okay";
 164 };
 165
 166 &can1 {
 167         pinctrl-names = "default";
 168         pinctrl-0 = <&pinctrl_can1>;
 169         xceiver-supply = <&reg_can_xcvr>;
 170         status = "okay";
 171 };
 172
 173 &can2 {
 174         pinctrl-names = "default";
 175         pinctrl-0 = <&pinctrl_can2>;
 176         xceiver-supply = <&reg_can_xcvr>;
 177         status = "okay";
 178 };
 179
 180 &ecspi1 {
 181         pinctrl-names = "default";
 182         pinctrl-0 = <&pinctrl_ecspi1>;
 183         status = "okay";
 184
 185         cs-gpios = <
 186                 &gpio2 30 GPIO_ACTIVE_HIGH
 187                 &gpio3 19 GPIO_ACTIVE_HIGH
 188         >;
 189
 190         spidev0: spi@0 {
 191                 compatible = "spidev";
 192                 reg = <0>;
 193                 spi-max-frequency = <54000000>;
 194         };
 195
 196         spidev1: spi@1 {
 197                 compatible = "spidev";
 198                 reg = <1>;
 199                 spi-max-frequency = <54000000>;
 200         };
 201 };
 202
 203 &esdhc1 {
 204         cd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
 205         fsl,wp-controller;
 206         pinctrl-names = "default";
 207         pinctrl-0 = <&pinctrl_esdhc1>;
 208         status = "okay";
 209 };
 210
 211 &esdhc2 {
 212         cd-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
 213         fsl,wp-controller;
 214         pinctrl-names = "default";
 215         pinctrl-0 = <&pinctrl_esdhc2>;
 216         status = "okay";
 217 };
 218
 219 &fec {
 220         pinctrl-names = "default";
 221         pinctrl-0 = <&pinctrl_fec>;
 222         phy-mode = "rmii";
 223         phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
 224         phy-handle = <&phy0>;
 225         mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */
 226         status = "okay";
 227
 228         phy0: ethernet-phy@0 {
 229                 interrupt-parent = <&gpio2>;
 230                 interrupts = <4>;
 231                 device_type = "ethernet-phy";
 232         };
 233 };
 234
 235 &i2c1 {
 236         pinctrl-names = "default";
 237         pinctrl-0 = <&pinctrl_i2c1>;
 238         clock-frequency = <400000>;
 239         status = "okay";
 240
 241         rtc1: ds1339@68 {
 242                 compatible = "dallas,ds1339";
 243                 reg = <0x68>;
 244                 pinctrl-names = "default";
 245                 pinctrl-0 = <&pinctrl_ds1339>;
 246                 interrupt-parent = <&gpio4>;
 247                 interrupts = <20 0>;
 248                 trickle-resistor-ohms = <250>;
 249                 trickle-diode-disable;
 250         };
 251 };
 252
 253 &iomuxc {
 254         pinctrl-names = "default";
 255         pinctrl-0 = <&pinctrl_hog>;
 256
 257         imx53-tx53 {
 258                 pinctrl_hog: hoggrp {
 259                         /* pins not in use by any device on the Starterkit board series */
 260                         fsl,pins = <
 261                                 /* CMOS Sensor Interface */
 262                                 MX53_PAD_CSI0_DAT12__GPIO5_30 0x1f4
 263                                 MX53_PAD_CSI0_DAT13__GPIO5_31 0x1f4
 264                                 MX53_PAD_CSI0_DAT14__GPIO6_0 0x1f4
 265                                 MX53_PAD_CSI0_DAT15__GPIO6_1 0x1f4
 266                                 MX53_PAD_CSI0_DAT16__GPIO6_2 0x1f4
 267                                 MX53_PAD_CSI0_DAT17__GPIO6_3 0x1f4
 268                                 MX53_PAD_CSI0_DAT18__GPIO6_4 0x1f4
 269                                 MX53_PAD_CSI0_DAT19__GPIO6_5 0x1f4
 270                                 MX53_PAD_CSI0_MCLK__GPIO5_19 0x1f4
 271                                 MX53_PAD_CSI0_VSYNC__GPIO5_21 0x1f4
 272                                 MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x1f4
 273                                 MX53_PAD_GPIO_0__GPIO1_0 0x1f4
 274                                 /* Module Specific Signal */
 275                                 /* MX53_PAD_NANDF_CS2__GPIO6_15 0x1f4 maybe used by EDT-FT5x06 */
 276                                 /* MX53_PAD_EIM_A16__GPIO2_22 0x1f4 maybe used by EDT-FT5x06 */
 277                                 MX53_PAD_EIM_D29__GPIO3_29 0x1f4
 278                                 MX53_PAD_EIM_EB3__GPIO2_31 0x1f4
 279                                 /* MX53_PAD_EIM_A17__GPIO2_21 0x1f4 maybe used by EDT-FT5x06 */
 280                                 /* MX53_PAD_EIM_A18__GPIO2_20 0x1f4 used by LED */
 281                                 MX53_PAD_EIM_A19__GPIO2_19 0x1f4
 282                                 MX53_PAD_EIM_A20__GPIO2_18 0x1f4
 283                                 MX53_PAD_EIM_A21__GPIO2_17 0x1f4
 284                                 MX53_PAD_EIM_A22__GPIO2_16 0x1f4
 285                                 MX53_PAD_EIM_A23__GPIO6_6 0x1f4
 286                                 MX53_PAD_EIM_A24__GPIO5_4 0x1f4
 287                                 MX53_PAD_CSI0_DAT8__GPIO5_26 0x1f4
 288                                 MX53_PAD_CSI0_DAT9__GPIO5_27 0x1f4
 289                                 MX53_PAD_CSI0_DAT10__GPIO5_28 0x1f4
 290                                 MX53_PAD_CSI0_DAT11__GPIO5_29 0x1f4
 291                                 /* MX53_PAD_EIM_D22__GPIO3_22 0x1f4 maybe used by EETI touchpanel driver */
 292                                 /* MX53_PAD_EIM_D23__GPIO3_23 0x1f4 maybe used by EETI touchpanel driver */
 293                                 MX53_PAD_GPIO_13__GPIO4_3 0x1f4
 294                                 MX53_PAD_EIM_CS0__GPIO2_23 0x1f4
 295                                 MX53_PAD_EIM_CS1__GPIO2_24 0x1f4
 296                                 MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x1f4
 297                                 MX53_PAD_EIM_WAIT__GPIO5_0 0x1f4
 298                                 MX53_PAD_EIM_EB0__GPIO2_28 0x1f4
 299                                 MX53_PAD_EIM_EB1__GPIO2_29 0x1f4
 300                                 MX53_PAD_EIM_OE__GPIO2_25 0x1f4
 301                                 MX53_PAD_EIM_LBA__GPIO2_27 0x1f4
 302                                 MX53_PAD_EIM_RW__GPIO2_26 0x1f4
 303                                 MX53_PAD_EIM_DA8__GPIO3_8 0x1f4
 304                                 MX53_PAD_EIM_DA9__GPIO3_9 0x1f4
 305                                 MX53_PAD_EIM_DA10__GPIO3_10 0x1f4
 306                                 MX53_PAD_EIM_DA11__GPIO3_11 0x1f4
 307                                 MX53_PAD_EIM_DA12__GPIO3_12 0x1f4
 308                                 MX53_PAD_EIM_DA13__GPIO3_13 0x1f4
 309                                 MX53_PAD_EIM_DA14__GPIO3_14 0x1f4
 310                                 MX53_PAD_EIM_DA15__GPIO3_15 0x1f4
 311                                 >;
 312                 };
 313
 314                 pinctrl_can1: can1grp {
 315                         fsl,pins = <
 316                                 MX53_PAD_GPIO_7__CAN1_TXCAN             0x80000000
 317                                 MX53_PAD_GPIO_8__CAN1_RXCAN             0x80000000
 318                         >;
 319                 };
 320
 321                 pinctrl_can2: can2grp {
 322                         fsl,pins = <
 323                                 MX53_PAD_KEY_COL4__CAN2_TXCAN           0x80000000
 324                                 MX53_PAD_KEY_ROW4__CAN2_RXCAN           0x80000000
 325                         >;
 326                 };
 327
 328                 pinctrl_can_xcvr: can-xcvrgrp {
 329                         fsl,pins = <MX53_PAD_DISP0_DAT0__GPIO4_21 0xe0>; /* Flexcan XCVR enable */
 330                 };
 331
 332                 pinctrl_ds1339: ds1339grp {
 333                         fsl,pins = <MX53_PAD_DI0_PIN4__GPIO4_20 0xe0>;
 334                 };
 335
 336                 pinctrl_ecspi1: ecspi1grp {
 337                         fsl,pins = <
 338                                 MX53_PAD_GPIO_19__ECSPI1_RDY            0x80000000
 339                                 MX53_PAD_EIM_EB2__ECSPI1_SS0            0x80000000
 340                                 MX53_PAD_EIM_D16__ECSPI1_SCLK           0x80000000
 341                                 MX53_PAD_EIM_D17__ECSPI1_MISO           0x80000000
 342                                 MX53_PAD_EIM_D18__ECSPI1_MOSI           0x80000000
 343                                 MX53_PAD_EIM_D19__ECSPI1_SS1            0x80000000
 344                         >;
 345                 };
 346
 347                 pinctrl_esdhc1: esdhc1grp {
 348                         fsl,pins = <
 349                                 MX53_PAD_SD1_DATA0__ESDHC1_DAT0         0x1d5
 350                                 MX53_PAD_SD1_DATA1__ESDHC1_DAT1         0x1d5
 351                                 MX53_PAD_SD1_DATA2__ESDHC1_DAT2         0x1d5
 352                                 MX53_PAD_SD1_DATA3__ESDHC1_DAT3         0x1d5
 353                                 MX53_PAD_SD1_CMD__ESDHC1_CMD            0x1d5
 354                                 MX53_PAD_SD1_CLK__ESDHC1_CLK            0x1d5
 355                                 MX53_PAD_EIM_D24__GPIO3_24 0x1f0
 356                         >;
 357                 };
 358
 359                 pinctrl_esdhc2: esdhc2grp {
 360                         fsl,pins = <
 361                                 MX53_PAD_SD2_CMD__ESDHC2_CMD            0x1d5
 362                                 MX53_PAD_SD2_CLK__ESDHC2_CLK            0x1d5
 363                                 MX53_PAD_SD2_DATA0__ESDHC2_DAT0         0x1d5
 364                                 MX53_PAD_SD2_DATA1__ESDHC2_DAT1         0x1d5
 365                                 MX53_PAD_SD2_DATA2__ESDHC2_DAT2         0x1d5
 366                                 MX53_PAD_SD2_DATA3__ESDHC2_DAT3         0x1d5
 367                                 MX53_PAD_EIM_D25__GPIO3_25 0x1f0
 368                         >;
 369                 };
 370
 371                 pinctrl_fec: fecgrp {
 372                         fsl,pins = <
 373                                 MX53_PAD_FEC_MDC__FEC_MDC               0x80000000
 374                                 MX53_PAD_FEC_MDIO__FEC_MDIO             0x80000000
 375                                 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK        0x80000000
 376                                 MX53_PAD_FEC_RX_ER__FEC_RX_ER           0x80000000
 377                                 MX53_PAD_FEC_CRS_DV__FEC_RX_DV          0x80000000
 378                                 MX53_PAD_FEC_RXD1__FEC_RDATA_1          0x80000000
 379                                 MX53_PAD_FEC_RXD0__FEC_RDATA_0          0x80000000
 380                                 MX53_PAD_FEC_TX_EN__FEC_TX_EN           0x80000000
 381                                 MX53_PAD_FEC_TXD1__FEC_TDATA_1          0x80000000
 382                                 MX53_PAD_FEC_TXD0__FEC_TDATA_0          0x80000000
 383                         >;
 384                 };
 385
 386                 pinctrl_gpio_key: gpio-keygrp {
 387                         fsl,pins = <MX53_PAD_EIM_A25__GPIO5_2 0x1f4>;
 388                 };
 389
 390                 pinctrl_i2c1: i2c1grp {
 391                         fsl,pins = <
 392                                 MX53_PAD_EIM_D21__I2C1_SCL              0x400001e4
 393                                 MX53_PAD_EIM_D28__I2C1_SDA              0x400001e4
 394                         >;
 395                 };
 396
 397                 pinctrl_i2c3: i2c3grp {
 398                         fsl,pins = <
 399                                 MX53_PAD_GPIO_3__I2C3_SCL               0x400001e4
 400                                 MX53_PAD_GPIO_6__I2C3_SDA               0x400001e4
 401                         >;
 402                 };
 403
 404                 pinctrl_nand: nandgrp {
 405                         fsl,pins = <
 406                                 MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B     0x4
 407                                 MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B     0x4
 408                                 MX53_PAD_NANDF_CLE__EMI_NANDF_CLE       0x4
 409                                 MX53_PAD_NANDF_ALE__EMI_NANDF_ALE       0x4
 410                                 MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B     0xe0
 411                                 MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0      0xe0
 412                                 MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0      0x4
 413                                 MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0    0xa4
 414                                 MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1    0xa4
 415                                 MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2    0xa4
 416                                 MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3    0xa4
 417                                 MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4    0xa4
 418                                 MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5    0xa4
 419                                 MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6    0xa4
 420                                 MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7    0xa4
 421                         >;
 422                 };
 423
 424                 pinctrl_pwm2: pwm2grp {
 425                         fsl,pins = <
 426                                 MX53_PAD_GPIO_1__PWM2_PWMO              0x80000000
 427                         >;
 428                 };
 429
 430                 pinctrl_ssi1: ssi1grp {
 431                         fsl,pins = <
 432                                 MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC      0x80000000
 433                                 MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD      0x80000000
 434                                 MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS     0x80000000
 435                                 MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD      0x80000000
 436                         >;
 437                 };
 438
 439                 pinctrl_ssi2: ssi2grp {
 440                         fsl,pins = <
 441                                 MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC     0x80000000
 442                                 MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD     0x80000000
 443                                 MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS    0x80000000
 444                                 MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD     0x80000000
 445                                 MX53_PAD_EIM_D27__GPIO3_27 0x1f0
 446                         >;
 447                 };
 448
 449                 pinctrl_stk5led: stk5ledgrp {
 450                         fsl,pins = <MX53_PAD_EIM_A18__GPIO2_20 0xc0>;
 451                 };
 452
 453                 pinctrl_uart1: uart1grp {
 454                         fsl,pins = <
 455                                 MX53_PAD_PATA_DIOW__UART1_TXD_MUX       0x1e4
 456                                 MX53_PAD_PATA_DMACK__UART1_RXD_MUX      0x1e4
 457                                 MX53_PAD_PATA_RESET_B__UART1_CTS        0x1c5
 458                                 MX53_PAD_PATA_IORDY__UART1_RTS          0x1c5
 459                         >;
 460                 };
 461
 462                 pinctrl_uart2: uart2grp {
 463                         fsl,pins = <
 464                                 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX  0x1c5
 465                                 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX      0x1c5
 466                                 MX53_PAD_PATA_DIOR__UART2_RTS           0x1c5
 467                                 MX53_PAD_PATA_INTRQ__UART2_CTS          0x1c5
 468                         >;
 469                 };
 470
 471                 pinctrl_uart3: uart3grp {
 472                         fsl,pins = <
 473                                 MX53_PAD_PATA_CS_0__UART3_TXD_MUX       0x1e4
 474                                 MX53_PAD_PATA_CS_1__UART3_RXD_MUX       0x1e4
 475                                 MX53_PAD_PATA_DA_1__UART3_CTS           0x1e4
 476                                 MX53_PAD_PATA_DA_2__UART3_RTS           0x1e4
 477                         >;
 478                 };
 479
 480                 pinctrl_usbh1: usbh1grp {
 481                         fsl,pins = <
 482                                 MX53_PAD_EIM_D30__GPIO3_30 0x100 /* OC */
 483                         >;
 484                 };
 485
 486                 pinctrl_usbh1_vbus: usbh1-vbusgrp {
 487                         fsl,pins = <
 488                                 MX53_PAD_EIM_D31__GPIO3_31 0xe0 /* VBUS ENABLE */
 489                         >;
 490                 };
 491
 492                 pinctrl_usbotg_vbus: usbotg-vbusgrp {
 493                         fsl,pins = <
 494                                 MX53_PAD_GPIO_7__GPIO1_7 0xe0 /* VBUS ENABLE */
 495                                 MX53_PAD_GPIO_8__GPIO1_8 0x100 /* OC */
 496                         >;
 497                 };
 498         };
 499 };
 500
 501 &ipu {
 502         status = "okay";
 503 };
 504
 505 &nfc {
 506         pinctrl-names = "default";
 507         pinctrl-0 = <&pinctrl_nand>;
 508         nand-bus-width = <8>;
 509         nand-ecc-mode = "hw";
 510         nand-on-flash-bbt;
 511         status = "okay";
 512 };
 513
 514 &pwm2 {
 515         pinctrl-names = "default";
 516         pinctrl-0 = <&pinctrl_pwm2>;
 517         #pwm-cells = <3>;
 518 };
 519
 520 &sdma {
 521         fsl,sdma-ram-script-name = "sdma-imx53.bin";
 522 };
 523
 524 &ssi1 {
 525         codec-handle = <&sgtl5000>;
 526         status = "okay";
 527 };
 528
 529 &ssi2 {
 530         status = "disabled";
 531 };
 532
 533 &uart1 {
 534         pinctrl-names = "default";
 535         pinctrl-0 = <&pinctrl_uart1>;
 536         uart-has-rtscts;
 537         status = "okay";
 538 };
 539
 540 &uart2 {
 541         pinctrl-names = "default";
 542         pinctrl-0 = <&pinctrl_uart2>;
 543         uart-has-rtscts;
 544         status = "okay";
 545 };
 546
 547 &uart3 {
 548         pinctrl-names = "default";
 549         pinctrl-0 = <&pinctrl_uart3>;
 550         uart-has-rtscts;
 551         status = "okay";
 552 };
 553
 554 &usbh1 {
 555         pinctrl-names = "default";
 556         pinctrl-0 = <&pinctrl_usbh1>;
 557         phy_type = "utmi";
 558         disable-over-current;
 559         vbus-supply = <&reg_usbh1_vbus>;
 560         status = "okay";
 561 };
 562
 563 &usbotg {
 564         phy_type = "utmi";
 565         dr_mode = "peripheral";
 566         disable-over-current;
 567         vbus-supply = <&reg_usbotg_vbus>;
 568         status = "okay";
 569 };