arch/arm/boot/dts/imx6ul-tx6ul-mainboard.dts

   1 /*
   2  * Copyright 2016 Lothar Waßmann <LW@KARO-electronics.de>
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License
  11  *     version 2 as published by the Free Software Foundation.
  12  *
  13  *     This file is distributed in the hope that it will be useful,
  14  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *     GNU General Public License for more details.
  17  *
  18  * Or, alternatively,
  19  *
  20  *  b) Permission is hereby granted, free of charge, to any person
  21  *     obtaining a copy of this software and associated documentation
  22  *     files (the "Software"), to deal in the Software without
  23  *     restriction, including without limitation the rights to use,
  24  *     copy, modify, merge, publish, distribute, sublicense, and/or
  25  *     sell copies of the Software, and to permit persons to whom the
  26  *     Software is furnished to do so, subject to the following
  27  *     conditions:
  28  *
  29  *     The above copyright notice and this permission notice shall be
  30  *     included in all copies or substantial portions of the Software.
  31  *
  32  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  33  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  34  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  35  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  36  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  37  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  38  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  39  *     OTHER DEALINGS IN THE SOFTWARE.
  40  */
  41
  42 /dts-v1/;
  43 #include "imx6ul.dtsi"
  44 #include "imx6ul-tx6ul.dtsi"
  45
  46 / {
  47         model = "Ka-Ro electronics TXUL-0011 Module on TXUL Mainboard";
  48         compatible = "karo,imx6ul-tx6ul", "fsl,imx6ul";
  49
  50         aliases {
  51                 lcdif_24bit_pins_a = &pinctrl_disp0_3;
  52                 mmc0 = &usdhc2;
  53                 mmc1 = &usdhc1;
  54                 serial2 = &uart3;
  55                 serial4 = &uart5;
  56         };
  57
  58         /delete-node/ sound;
  59 };
  60
  61 &can1 {
  62         xceiver-supply = <&reg_3v3>;
  63 };
  64
  65 &can2 {
  66         xceiver-supply = <&reg_3v3>;
  67 };
  68
  69 &ds1339 {
  70         status = "disabled";
  71 };
  72
  73 &fec1 {
  74         pinctrl-0 = <&pinctrl_enet1 &pinctrl_etnphy0_rst>;
  75         /delete-node/ mdio;
  76 };
  77
  78 &fec2 {
  79         pinctrl-names = "default";
  80         pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio &pinctrl_etnphy1_rst>;
  81         phy-mode = "rmii";
  82         phy-reset-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
  83         phy-supply = <&reg_3v3_etn>;
  84         phy-handle = <&etnphy1>;
  85         status = "okay";
  86
  87         mdio {
  88                 #address-cells = <1>;
  89                 #size-cells = <0>;
  90
  91                 etnphy0: ethernet-phy@0 {
  92                         compatible = "ethernet-phy-ieee802.3-c22";
  93                         reg = <0>;
  94                         pinctrl-names = "default";
  95                         pinctrl-0 = <&pinctrl_etnphy0_int>;
  96                         interrupt-parent = <&gpio5>;
  97                         interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
  98                         interrupts-extended = <&gpio5 5 IRQ_TYPE_EDGE_FALLING>;
  99                         status = "okay";
 100                 };
 101
 102                 etnphy1: ethernet-phy@2 {
 103                         compatible = "ethernet-phy-ieee802.3-c22";
 104                         reg = <2>;
 105                         pinctrl-names = "default";
 106                         pinctrl-0 = <&pinctrl_etnphy1_int>;
 107                         interrupt-parent = <&gpio4>;
 108                         interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
 109                         interrupts-extended = <&gpio4 27 IRQ_TYPE_EDGE_FALLING>;
 110                         status = "okay";
 111                 };
 112         };
 113 };
 114
 115 &gpmi {
 116         status = "disabled";
 117 };
 118
 119 &i2c_gpio {
 120         status = "disabled";
 121 };
 122
 123 &i2c2 {
 124         /delete-node/ codec@0a;
 125         /delete-node/ touchscreen@48;
 126
 127         rtc: mcp7940x@6f {
 128                 compatible = "microchip,mcp7940x";
 129                 reg = <0x6f>;
 130         };
 131 };
 132
 133 &kpp {
 134         status = "disabled";
 135 };
 136
 137 &lcdif {
 138         pinctrl-0 = <&pinctrl_disp0_3>;
 139 };
 140
 141 &reg_usbotg_vbus{
 142         status = "disabled";
 143 };
 144
 145 &usdhc1 {
 146         pinctrl-0 = <&pinctrl_usdhc1>;
 147         non-removable;
 148         /delete-property/ cd-gpios;
 149         cap-sdio-irq;
 150 };
 151
 152 &usdhc2 {
 153         pinctrl-names = "default";
 154         pinctrl-0 = <&pinctrl_usdhc2>;
 155         bus-width = <4>;
 156         no-1-8-v;
 157         non-removable;
 158         fsl,wp-controller;
 159         status = "okay";
 160 };
 161
 162 &uart1 {
 163         pinctrl-0 = <&pinctrl_uart1>;
 164         /delete-property/ fsl,uart-has-rtscts;
 165 };
 166
 167 &uart2 {
 168         pinctrl-0 = <&pinctrl_uart2>;
 169         /delete-property/ fsl,uart-has-rtscts;
 170         status = "okay";
 171 };
 172
 173 &uart3 {
 174         pinctrl-names = "default";
 175         pinctrl-0 = <&pinctrl_uart3>;
 176         status = "okay";
 177 };
 178
 179 &uart4 {
 180         pinctrl-names = "default";
 181         pinctrl-0 = <&pinctrl_uart4>;
 182         status = "okay";
 183 };
 184
 185 &uart5 {
 186         pinctrl-names = "default";
 187         pinctrl-0 = <&pinctrl_uart5>;
 188         status = "okay";
 189 };
 190
 191 &uart6 {
 192         pinctrl-names = "default";
 193         pinctrl-0 = <&pinctrl_uart6>;
 194         status = "okay";
 195 };
 196
 197 &uart7 {
 198         pinctrl-names = "default";
 199         pinctrl-0 = <&pinctrl_uart7>;
 200         status = "okay";
 201 };
 202
 203 &uart8 {
 204         pinctrl-names = "default";
 205         pinctrl-0 = <&pinctrl_uart8>;
 206         status = "disabled"; /* conflicts with LCDIF */
 207 };
 208
 209 &iomuxc {
 210         hoggrp {
 211                 fsl,pins = <
 212                         MX6UL_PAD_CSI_DATA01__GPIO4_IO22        0x0b0b0 /* WLAN_RESET */
 213                 >;
 214         };
 215
 216         pinctrl_disp0_3: disp0grp-3 {
 217                 fsl,pins = <
 218                         MX6UL_PAD_LCD_CLK__LCDIF_CLK            0x10 /* LSCLK */
 219                         MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE      0x10 /* OE_ACD */
 220                         MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC        0x10 /* HSYNC */
 221                         MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC        0x10 /* VSYNC */
 222                         MX6UL_PAD_LCD_DATA02__LCDIF_DATA02      0x10
 223                         MX6UL_PAD_LCD_DATA03__LCDIF_DATA03      0x10
 224                         MX6UL_PAD_LCD_DATA04__LCDIF_DATA04      0x10
 225                         MX6UL_PAD_LCD_DATA05__LCDIF_DATA05      0x10
 226                         MX6UL_PAD_LCD_DATA06__LCDIF_DATA06      0x10
 227                         MX6UL_PAD_LCD_DATA07__LCDIF_DATA07      0x10
 228                         /* LCD_DATA08..09 not wired */
 229                         MX6UL_PAD_LCD_DATA10__LCDIF_DATA10      0x10
 230                         MX6UL_PAD_LCD_DATA11__LCDIF_DATA11      0x10
 231                         MX6UL_PAD_LCD_DATA12__LCDIF_DATA12      0x10
 232                         MX6UL_PAD_LCD_DATA13__LCDIF_DATA13      0x10
 233                         MX6UL_PAD_LCD_DATA14__LCDIF_DATA14      0x10
 234                         MX6UL_PAD_LCD_DATA15__LCDIF_DATA15      0x10
 235                         /* LCD_DATA16..17 not wired */
 236                         MX6UL_PAD_LCD_DATA18__LCDIF_DATA18      0x10
 237                         MX6UL_PAD_LCD_DATA19__LCDIF_DATA19      0x10
 238                         MX6UL_PAD_LCD_DATA20__LCDIF_DATA20      0x10
 239                         MX6UL_PAD_LCD_DATA21__LCDIF_DATA21      0x10
 240                         MX6UL_PAD_LCD_DATA22__LCDIF_DATA22      0x10
 241                         MX6UL_PAD_LCD_DATA23__LCDIF_DATA23      0x10
 242                 >;
 243         };
 244
 245         pinctrl_enet2_mdio: enet2-mdiogrp {
 246                 fsl,pins = <
 247                         MX6UL_PAD_GPIO1_IO07__ENET2_MDC         0x0b0b0
 248                         MX6UL_PAD_GPIO1_IO06__ENET2_MDIO        0x1b0b0
 249                 >;
 250         };
 251
 252         pinctrl_uart3: uart3grp {
 253                 fsl,pins = <
 254                         MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX   0x0b0b0
 255                         MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX   0x0b0b0
 256                 >;
 257         };
 258
 259         pinctrl_uart4: uart4grp {
 260                 fsl,pins = <
 261                         MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX   0x0b0b0
 262                         MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX   0x0b0b0
 263                 >;
 264         };
 265
 266         pinctrl_uart6: uart6grp {
 267                 fsl,pins = <
 268                         MX6UL_PAD_CSI_MCLK__UART6_DCE_TX        0x0b0b0
 269                         MX6UL_PAD_CSI_PIXCLK__UART6_DCE_RX      0x0b0b0
 270                 >;
 271         };
 272
 273         pinctrl_uart7: uart7grp {
 274                 fsl,pins = <
 275                         MX6UL_PAD_LCD_DATA16__UART7_DCE_TX      0x0b0b0
 276                         MX6UL_PAD_LCD_DATA17__UART7_DCE_RX      0x0b0b0
 277                 >;
 278         };
 279
 280         pinctrl_uart8: uart8grp {
 281                 fsl,pins = <
 282                         MX6UL_PAD_LCD_DATA20__UART8_DCE_TX      0x0b0b0
 283                         MX6UL_PAD_LCD_DATA21__UART8_DCE_RX      0x0b0b0
 284                 >;
 285         };
 286 };