arch/arm/boot/dts/sh73a0.dtsi

   1 /*
   2  * Device Tree Source for the SH73A0 SoC
   3  *
   4  * Copyright (C) 2012 Renesas Solutions Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 /include/ "skeleton.dtsi"
  12
  13 / {
  14         compatible = "renesas,sh73a0";
  15
  16         cpus {
  17                 #address-cells = <1>;
  18                 #size-cells = <0>;
  19
  20                 cpu@0 {
  21                         device_type = "cpu";
  22                         compatible = "arm,cortex-a9";
  23                         reg = <0>;
  24                 };
  25                 cpu@1 {
  26                         device_type = "cpu";
  27                         compatible = "arm,cortex-a9";
  28                         reg = <1>;
  29                 };
  30         };
  31
  32         gic: interrupt-controller@f0001000 {
  33                 compatible = "arm,cortex-a9-gic";
  34                 #interrupt-cells = <3>;
  35                 #address-cells = <1>;
  36                 interrupt-controller;
  37                 reg = <0xf0001000 0x1000>,
  38                       <0xf0000100 0x100>;
  39         };
  40
  41         pmu {
  42                 compatible = "arm,cortex-a9-pmu";
  43                 interrupts = <0 55 4>,
  44                              <0 56 4>;
  45         };
  46
  47         irqpin0: irqpin@e6900000 {
  48                 compatible = "renesas,intc-irqpin";
  49                 #interrupt-cells = <2>;
  50                 interrupt-controller;
  51                 reg = <0xe6900000 4>,
  52                         <0xe6900010 4>,
  53                         <0xe6900020 1>,
  54                         <0xe6900040 1>,
  55                         <0xe6900060 1>;
  56                 interrupt-parent = <&gic>;
  57                 interrupts = <0 1 0x4
  58                               0 2 0x4
  59                               0 3 0x4
  60                               0 4 0x4
  61                               0 5 0x4
  62                               0 6 0x4
  63                               0 7 0x4
  64                               0 8 0x4>;
  65         };
  66
  67         irqpin1: irqpin@e6900004 {
  68                 compatible = "renesas,intc-irqpin";
  69                 #interrupt-cells = <2>;
  70                 interrupt-controller;
  71                 reg = <0xe6900004 4>,
  72                         <0xe6900014 4>,
  73                         <0xe6900024 1>,
  74                         <0xe6900044 1>,
  75                         <0xe6900064 1>;
  76                 interrupt-parent = <&gic>;
  77                 interrupts = <0 9 0x4
  78                               0 10 0x4
  79                               0 11 0x4
  80                               0 12 0x4
  81                               0 13 0x4
  82                               0 14 0x4
  83                               0 15 0x4
  84                               0 16 0x4>;
  85                 control-parent;
  86         };
  87
  88         irqpin2: irqpin@e6900008 {
  89                 compatible = "renesas,intc-irqpin";
  90                 #interrupt-cells = <2>;
  91                 interrupt-controller;
  92                 reg = <0xe6900008 4>,
  93                         <0xe6900018 4>,
  94                         <0xe6900028 1>,
  95                         <0xe6900048 1>,
  96                         <0xe6900068 1>;
  97                 interrupt-parent = <&gic>;
  98                 interrupts = <0 17 0x4
  99                               0 18 0x4
 100                               0 19 0x4
 101                               0 20 0x4
 102                               0 21 0x4
 103                               0 22 0x4
 104                               0 23 0x4
 105                               0 24 0x4>;
 106         };
 107
 108         irqpin3: irqpin@e690000c {
 109                 compatible = "renesas,intc-irqpin";
 110                 #interrupt-cells = <2>;
 111                 interrupt-controller;
 112                 reg = <0xe690000c 4>,
 113                         <0xe690001c 4>,
 114                         <0xe690002c 1>,
 115                         <0xe690004c 1>,
 116                         <0xe690006c 1>;
 117                 interrupt-parent = <&gic>;
 118                 interrupts = <0 25 0x4
 119                               0 26 0x4
 120                               0 27 0x4
 121                               0 28 0x4
 122                               0 29 0x4
 123                               0 30 0x4
 124                               0 31 0x4
 125                               0 32 0x4>;
 126         };
 127
 128         i2c0: i2c@e6820000 {
 129                 #address-cells = <1>;
 130                 #size-cells = <0>;
 131                 compatible = "renesas,rmobile-iic";
 132                 reg = <0xe6820000 0x425>;
 133                 interrupt-parent = <&gic>;
 134                 interrupts = <0 167 0x4
 135                               0 168 0x4
 136                               0 169 0x4
 137                               0 170 0x4>;
 138         };
 139
 140         i2c1: i2c@e6822000 {
 141                 #address-cells = <1>;
 142                 #size-cells = <0>;
 143                 compatible = "renesas,rmobile-iic";
 144                 reg = <0xe6822000 0x425>;
 145                 interrupt-parent = <&gic>;
 146                 interrupts = <0 51 0x4
 147                               0 52 0x4
 148                               0 53 0x4
 149                               0 54 0x4>;
 150         };
 151
 152         i2c2: i2c@e6824000 {
 153                 #address-cells = <1>;
 154                 #size-cells = <0>;
 155                 compatible = "renesas,rmobile-iic";
 156                 reg = <0xe6824000 0x425>;
 157                 interrupt-parent = <&gic>;
 158                 interrupts = <0 171 0x4
 159                               0 172 0x4
 160                               0 173 0x4
 161                               0 174 0x4>;
 162         };
 163
 164         i2c3: i2c@e6826000 {
 165                 #address-cells = <1>;
 166                 #size-cells = <0>;
 167                 compatible = "renesas,rmobile-iic";
 168                 reg = <0xe6826000 0x425>;
 169                 interrupt-parent = <&gic>;
 170                 interrupts = <0 183 0x4
 171                               0 184 0x4
 172                               0 185 0x4
 173                               0 186 0x4>;
 174         };
 175
 176         i2c4: i2c@e6828000 {
 177                 #address-cells = <1>;
 178                 #size-cells = <0>;
 179                 compatible = "renesas,rmobile-iic";
 180                 reg = <0xe6828000 0x425>;
 181                 interrupt-parent = <&gic>;
 182                 interrupts = <0 187 0x4
 183                               0 188 0x4
 184                               0 189 0x4
 185                               0 190 0x4>;
 186         };
 187
 188         mmcif: mmcif@e6bd0000 {
 189                 compatible = "renesas,sh-mmcif";
 190                 reg = <0xe6bd0000 0x100>;
 191                 interrupt-parent = <&gic>;
 192                 interrupts = <0 140 0x4
 193                               0 141 0x4>;
 194                 reg-io-width = <4>;
 195                 status = "disabled";
 196         };
 197
 198         sdhi0: sdhi@ee100000 {
 199                 compatible = "renesas,sdhi-r8a7740";
 200                 reg = <0xee100000 0x100>;
 201                 interrupt-parent = <&gic>;
 202                 interrupts = <0 83 4
 203                                 0 84 4
 204                                 0 85 4>;
 205                 cap-sd-highspeed;
 206                 status = "disabled";
 207         };
 208
 209         /* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
 210         sdhi1: sdhi@ee120000 {
 211                 compatible = "renesas,sdhi-r8a7740";
 212                 reg = <0xee120000 0x100>;
 213                 interrupt-parent = <&gic>;
 214                 interrupts = <0 88 4
 215                                 0 89 4>;
 216                 toshiba,mmc-wrprotect-disable;
 217                 cap-sd-highspeed;
 218                 status = "disabled";
 219         };
 220
 221         sdhi2: sdhi@ee140000 {
 222                 compatible = "renesas,sdhi-r8a7740";
 223                 reg = <0xee140000 0x100>;
 224                 interrupt-parent = <&gic>;
 225                 interrupts = <0 104 4
 226                                 0 105 4>;
 227                 toshiba,mmc-wrprotect-disable;
 228                 cap-sd-highspeed;
 229                 status = "disabled";
 230         };
 231
 232         pfc: pfc@e6050000 {
 233                 compatible = "renesas,pfc-sh73a0";
 234                 reg = <0xe6050000 0x8000>,
 235                       <0xe605801c 0x1c>;
 236                 gpio-controller;
 237                 #gpio-cells = <2>;
 238         };
 239 };