arch/arm/mach-omap2/timer.c

   1 /*
   2  * linux/arch/arm/mach-omap2/timer.c
   3  *
   4  * OMAP2 GP timer support.
   5  *
   6  * Copyright (C) 2009 Nokia Corporation
   7  *
   8  * Update to use new clocksource/clockevent layers
   9  * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
  10  * Copyright (C) 2007 MontaVista Software, Inc.
  11  *
  12  * Original driver:
  13  * Copyright (C) 2005 Nokia Corporation
  14  * Author: Paul Mundt <paul.mundt@nokia.com>
  15  *         Juha Yrjölä <juha.yrjola@nokia.com>
  16  * OMAP Dual-mode timer framework support by Timo Teras
  17  *
  18  * Some parts based off of TI's 24xx code:
  19  *
  20  * Copyright (C) 2004-2009 Texas Instruments, Inc.
  21  *
  22  * Roughly modelled after the OMAP1 MPU timer code.
  23  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  24  *
  25  * This file is subject to the terms and conditions of the GNU General Public
  26  * License. See the file "COPYING" in the main directory of this archive
  27  * for more details.
  28  */
  29 #include <linux/init.h>
  30 #include <linux/time.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/err.h>
  33 #include <linux/clk.h>
  34 #include <linux/delay.h>
  35 #include <linux/irq.h>
  36 #include <linux/clocksource.h>
  37 #include <linux/clockchips.h>
  38 #include <linux/slab.h>
  39 #include <linux/of.h>
  40 #include <linux/of_address.h>
  41 #include <linux/of_irq.h>
  42 #include <linux/platform_device.h>
  43 #include <linux/platform_data/dmtimer-omap.h>
  44
  45 #include <asm/mach/time.h>
  46 #include <asm/smp_twd.h>
  47 #include <asm/sched_clock.h>
  48
  49 #include <asm/arch_timer.h>
  50 #include "omap_hwmod.h"
  51 #include "omap_device.h"
  52 #include <plat/counter-32k.h>
  53 #include <plat/dmtimer.h>
  54 #include "omap-pm.h"
  55
  56 #include "soc.h"
  57 #include "common.h"
  58 #include "powerdomain.h"
  59
  60 #define REALTIME_COUNTER_BASE                           0x48243200
  61 #define INCREMENTER_NUMERATOR_OFFSET                    0x10
  62 #define INCREMENTER_DENUMERATOR_RELOAD_OFFSET           0x14
  63 #define NUMERATOR_DENUMERATOR_MASK                      0xfffff000
  64
  65 /* Clockevent code */
  66
  67 static struct omap_dm_timer clkev;
  68 static struct clock_event_device clockevent_gpt;
  69
  70 static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
  71 {
  72         struct clock_event_device *evt = &clockevent_gpt;
  73
  74         __omap_dm_timer_write_status(&clkev, OMAP_TIMER_INT_OVERFLOW);
  75
  76         evt->event_handler(evt);
  77         return IRQ_HANDLED;
  78 }
  79
  80 static struct irqaction omap2_gp_timer_irq = {
  81         .name           = "gp_timer",
  82         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
  83         .handler        = omap2_gp_timer_interrupt,
  84 };
  85
  86 static int omap2_gp_timer_set_next_event(unsigned long cycles,
  87                                          struct clock_event_device *evt)
  88 {
  89         __omap_dm_timer_load_start(&clkev, OMAP_TIMER_CTRL_ST,
  90                                    0xffffffff - cycles, OMAP_TIMER_POSTED);
  91
  92         return 0;
  93 }
  94
  95 static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
  96                                     struct clock_event_device *evt)
  97 {
  98         u32 period;
  99
 100         __omap_dm_timer_stop(&clkev, OMAP_TIMER_POSTED, clkev.rate);
 101
 102         switch (mode) {
 103         case CLOCK_EVT_MODE_PERIODIC:
 104                 period = clkev.rate / HZ;
 105                 period -= 1;
 106                 /* Looks like we need to first set the load value separately */
 107                 __omap_dm_timer_write(&clkev, OMAP_TIMER_LOAD_REG,
 108                                       0xffffffff - period, OMAP_TIMER_POSTED);
 109                 __omap_dm_timer_load_start(&clkev,
 110                                         OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
 111                                         0xffffffff - period, OMAP_TIMER_POSTED);
 112                 break;
 113         case CLOCK_EVT_MODE_ONESHOT:
 114                 break;
 115         case CLOCK_EVT_MODE_UNUSED:
 116         case CLOCK_EVT_MODE_SHUTDOWN:
 117         case CLOCK_EVT_MODE_RESUME:
 118                 break;
 119         }
 120 }
 121
 122 static struct clock_event_device clockevent_gpt = {
 123         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 124         .rating         = 300,
 125         .set_next_event = omap2_gp_timer_set_next_event,
 126         .set_mode       = omap2_gp_timer_set_mode,
 127 };
 128
 129 static struct property device_disabled = {
 130         .name = "status",
 131         .length = sizeof("disabled"),
 132         .value = "disabled",
 133 };
 134
 135 static struct of_device_id omap_timer_match[] __initdata = {
 136         { .compatible = "ti,omap2-timer", },
 137         { }
 138 };
 139
 140 /**
 141  * omap_get_timer_dt - get a timer using device-tree
 142  * @match       - device-tree match structure for matching a device type
 143  * @property    - optional timer property to match
 144  *
 145  * Helper function to get a timer during early boot using device-tree for use
 146  * as kernel system timer. Optionally, the property argument can be used to
 147  * select a timer with a specific property. Once a timer is found then mark
 148  * the timer node in device-tree as disabled, to prevent the kernel from
 149  * registering this timer as a platform device and so no one else can use it.
 150  */
 151 static struct device_node * __init omap_get_timer_dt(struct of_device_id *match,
 152                                                      const char *property)
 153 {
 154         struct device_node *np;
 155
 156         for_each_matching_node(np, match) {
 157                 if (!of_device_is_available(np))
 158                         continue;
 159
 160                 if (property && !of_get_property(np, property, NULL))
 161                         continue;
 162
 163                 if (!property && (of_get_property(np, "ti,timer-alwon", NULL) ||
 164                                   of_get_property(np, "ti,timer-dsp", NULL) ||
 165                                   of_get_property(np, "ti,timer-pwm", NULL) ||
 166                                   of_get_property(np, "ti,timer-secure", NULL)))
 167                         continue;
 168
 169                 of_add_property(np, &device_disabled);
 170                 return np;
 171         }
 172
 173         return NULL;
 174 }
 175
 176 /**
 177  * omap_dmtimer_init - initialisation function when device tree is used
 178  *
 179  * For secure OMAP3 devices, timers with device type "timer-secure" cannot
 180  * be used by the kernel as they are reserved. Therefore, to prevent the
 181  * kernel registering these devices remove them dynamically from the device
 182  * tree on boot.
 183  */
 184 static void __init omap_dmtimer_init(void)
 185 {
 186         struct device_node *np;
 187
 188         if (!cpu_is_omap34xx())
 189                 return;
 190
 191         /* If we are a secure device, remove any secure timer nodes */
 192         if ((omap_type() != OMAP2_DEVICE_TYPE_GP)) {
 193                 np = omap_get_timer_dt(omap_timer_match, "ti,timer-secure");
 194                 if (np)
 195                         of_node_put(np);
 196         }
 197 }
 198
 199 /**
 200  * omap_dm_timer_get_errata - get errata flags for a timer
 201  *
 202  * Get the timer errata flags that are specific to the OMAP device being used.
 203  */
 204 static u32 __init omap_dm_timer_get_errata(void)
 205 {
 206         if (cpu_is_omap24xx())
 207                 return 0;
 208
 209         return OMAP_TIMER_ERRATA_I103_I767;
 210 }
 211
 212 static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
 213                                          const char *fck_source,
 214                                          const char *property,
 215                                          const char **timer_name,
 216                                          int posted)
 217 {
 218         char name[10]; /* 10 = sizeof("gptXX_Xck0") */
 219         const char *oh_name;
 220         struct device_node *np;
 221         struct omap_hwmod *oh;
 222         struct resource irq, mem;
 223         struct clk *src;
 224         int r = 0;
 225
 226         if (of_have_populated_dt()) {
 227                 np = omap_get_timer_dt(omap_timer_match, property);
 228                 if (!np)
 229                         return -ENODEV;
 230
 231                 of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
 232                 if (!oh_name)
 233                         return -ENODEV;
 234
 235                 timer->irq = irq_of_parse_and_map(np, 0);
 236                 if (!timer->irq)
 237                         return -ENXIO;
 238
 239                 timer->io_base = of_iomap(np, 0);
 240
 241                 of_node_put(np);
 242         } else {
 243                 if (omap_dm_timer_reserve_systimer(timer->id))
 244                         return -ENODEV;
 245
 246                 sprintf(name, "timer%d", timer->id);
 247                 oh_name = name;
 248         }
 249
 250         oh = omap_hwmod_lookup(oh_name);
 251         if (!oh)
 252                 return -ENODEV;
 253
 254         *timer_name = oh->name;
 255
 256         if (!of_have_populated_dt()) {
 257                 r = omap_hwmod_get_resource_byname(oh, IORESOURCE_IRQ, NULL,
 258                                                    &irq);
 259                 if (r)
 260                         return -ENXIO;
 261                 timer->irq = irq.start;
 262
 263                 r = omap_hwmod_get_resource_byname(oh, IORESOURCE_MEM, NULL,
 264                                                    &mem);
 265                 if (r)
 266                         return -ENXIO;
 267
 268                 /* Static mapping, never released */
 269                 timer->io_base = ioremap(mem.start, mem.end - mem.start);
 270         }
 271
 272         if (!timer->io_base)
 273                 return -ENXIO;
 274
 275         /* After the dmtimer is using hwmod these clocks won't be needed */
 276         timer->fclk = clk_get(NULL, omap_hwmod_get_main_clk(oh));
 277         if (IS_ERR(timer->fclk))
 278                 return PTR_ERR(timer->fclk);
 279
 280         src = clk_get(NULL, fck_source);
 281         if (IS_ERR(src))
 282                 return PTR_ERR(src);
 283
 284         if (clk_get_parent(timer->fclk) != src) {
 285                 r = clk_set_parent(timer->fclk, src);
 286                 if (r < 0) {
 287                         pr_warn("%s: %s cannot set source\n", __func__,
 288                                 oh->name);
 289                         clk_put(src);
 290                         return r;
 291                 }
 292         }
 293
 294         clk_put(src);
 295
 296         omap_hwmod_setup_one(oh_name);
 297         omap_hwmod_enable(oh);
 298         __omap_dm_timer_init_regs(timer);
 299
 300         if (posted)
 301                 __omap_dm_timer_enable_posted(timer);
 302
 303         /* Check that the intended posted configuration matches the actual */
 304         if (posted != timer->posted)
 305                 return -EINVAL;
 306
 307         timer->rate = clk_get_rate(timer->fclk);
 308         timer->reserved = 1;
 309
 310         return r;
 311 }
 312
 313 static void __init omap2_gp_clockevent_init(int gptimer_id,
 314                                                 const char *fck_source,
 315                                                 const char *property)
 316 {
 317         int res;
 318
 319         clkev.id = gptimer_id;
 320         clkev.errata = omap_dm_timer_get_errata();
 321
 322         /*
 323          * For clock-event timers we never read the timer counter and
 324          * so we are not impacted by errata i103 and i767. Therefore,
 325          * we can safely ignore this errata for clock-event timers.
 326          */
 327         __omap_dm_timer_override_errata(&clkev, OMAP_TIMER_ERRATA_I103_I767);
 328
 329         res = omap_dm_timer_init_one(&clkev, fck_source, property,
 330                                      &clockevent_gpt.name, OMAP_TIMER_POSTED);
 331         BUG_ON(res);
 332
 333         omap2_gp_timer_irq.dev_id = &clkev;
 334         setup_irq(clkev.irq, &omap2_gp_timer_irq);
 335
 336         __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
 337
 338         clockevent_gpt.cpumask = cpu_possible_mask;
 339         clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev);
 340         clockevents_config_and_register(&clockevent_gpt, clkev.rate,
 341                                         3, /* Timer internal resynch latency */
 342                                         0xffffffff);
 343
 344         pr_info("OMAP clockevent source: %s at %lu Hz\n", clockevent_gpt.name,
 345                 clkev.rate);
 346 }
 347
 348 /* Clocksource code */
 349 static struct omap_dm_timer clksrc;
 350 static bool use_gptimer_clksrc;
 351
 352 /*
 353  * clocksource
 354  */
 355 static cycle_t clocksource_read_cycles(struct clocksource *cs)
 356 {
 357         return (cycle_t)__omap_dm_timer_read_counter(&clksrc,
 358                                                      OMAP_TIMER_NONPOSTED);
 359 }
 360
 361 static struct clocksource clocksource_gpt = {
 362         .rating         = 300,
 363         .read           = clocksource_read_cycles,
 364         .mask           = CLOCKSOURCE_MASK(32),
 365         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 366 };
 367
 368 static u32 notrace dmtimer_read_sched_clock(void)
 369 {
 370         if (clksrc.reserved)
 371                 return __omap_dm_timer_read_counter(&clksrc,
 372                                                     OMAP_TIMER_NONPOSTED);
 373
 374         return 0;
 375 }
 376
 377 static struct of_device_id omap_counter_match[] __initdata = {
 378         { .compatible = "ti,omap-counter32k", },
 379         { }
 380 };
 381
 382 /* Setup free-running counter for clocksource */
 383 static int __init __maybe_unused omap2_sync32k_clocksource_init(void)
 384 {
 385         int ret;
 386         struct device_node *np = NULL;
 387         struct omap_hwmod *oh;
 388         void __iomem *vbase;
 389         const char *oh_name = "counter_32k";
 390
 391         /*
 392          * If device-tree is present, then search the DT blob
 393          * to see if the 32kHz counter is supported.
 394          */
 395         if (of_have_populated_dt()) {
 396                 np = omap_get_timer_dt(omap_counter_match, NULL);
 397                 if (!np)
 398                         return -ENODEV;
 399
 400                 of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
 401                 if (!oh_name)
 402                         return -ENODEV;
 403         }
 404
 405         /*
 406          * First check hwmod data is available for sync32k counter
 407          */
 408         oh = omap_hwmod_lookup(oh_name);
 409         if (!oh || oh->slaves_cnt == 0)
 410                 return -ENODEV;
 411
 412         omap_hwmod_setup_one(oh_name);
 413
 414         if (np) {
 415                 vbase = of_iomap(np, 0);
 416                 of_node_put(np);
 417         } else {
 418                 vbase = omap_hwmod_get_mpu_rt_va(oh);
 419         }
 420
 421         if (!vbase) {
 422                 pr_warn("%s: failed to get counter_32k resource\n", __func__);
 423                 return -ENXIO;
 424         }
 425
 426         ret = omap_hwmod_enable(oh);
 427         if (ret) {
 428                 pr_warn("%s: failed to enable counter_32k module (%d)\n",
 429                                                         __func__, ret);
 430                 return ret;
 431         }
 432
 433         ret = omap_init_clocksource_32k(vbase);
 434         if (ret) {
 435                 pr_warn("%s: failed to initialize counter_32k as a clocksource (%d)\n",
 436                                                         __func__, ret);
 437                 omap_hwmod_idle(oh);
 438         }
 439
 440         return ret;
 441 }
 442
 443 static void __init omap2_gptimer_clocksource_init(int gptimer_id,
 444                                                   const char *fck_source,
 445                                                   const char *property)
 446 {
 447         int res;
 448
 449         clksrc.id = gptimer_id;
 450         clksrc.errata = omap_dm_timer_get_errata();
 451
 452         res = omap_dm_timer_init_one(&clksrc, fck_source, property,
 453                                      &clocksource_gpt.name,
 454                                      OMAP_TIMER_NONPOSTED);
 455         BUG_ON(res);
 456
 457         __omap_dm_timer_load_start(&clksrc,
 458                                    OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0,
 459                                    OMAP_TIMER_NONPOSTED);
 460         setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);
 461
 462         if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
 463                 pr_err("Could not register clocksource %s\n",
 464                         clocksource_gpt.name);
 465         else
 466                 pr_info("OMAP clocksource: %s at %lu Hz\n",
 467                         clocksource_gpt.name, clksrc.rate);
 468 }
 469
 470 #ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
 471 /*
 472  * The realtime counter also called master counter, is a free-running
 473  * counter, which is related to real time. It produces the count used
 474  * by the CPU local timer peripherals in the MPU cluster. The timer counts
 475  * at a rate of 6.144 MHz. Because the device operates on different clocks
 476  * in different power modes, the master counter shifts operation between
 477  * clocks, adjusting the increment per clock in hardware accordingly to
 478  * maintain a constant count rate.
 479  */
 480 static void __init realtime_counter_init(void)
 481 {
 482         void __iomem *base;
 483         static struct clk *sys_clk;
 484         unsigned long rate;
 485         unsigned int reg, num, den;
 486
 487         base = ioremap(REALTIME_COUNTER_BASE, SZ_32);
 488         if (!base) {
 489                 pr_err("%s: ioremap failed\n", __func__);
 490                 return;
 491         }
 492         sys_clk = clk_get(NULL, "sys_clkin");
 493         if (IS_ERR(sys_clk)) {
 494                 pr_err("%s: failed to get system clock handle\n", __func__);
 495                 iounmap(base);
 496                 return;
 497         }
 498
 499         rate = clk_get_rate(sys_clk);
 500         /* Numerator/denumerator values refer TRM Realtime Counter section */
 501         switch (rate) {
 502         case 1200000:
 503                 num = 64;
 504                 den = 125;
 505                 break;
 506         case 1300000:
 507                 num = 768;
 508                 den = 1625;
 509                 break;
 510         case 19200000:
 511                 num = 8;
 512                 den = 25;
 513                 break;
 514         case 2600000:
 515                 num = 384;
 516                 den = 1625;
 517                 break;
 518         case 2700000:
 519                 num = 256;
 520                 den = 1125;
 521                 break;
 522         case 38400000:
 523         default:
 524                 /* Program it for 38.4 MHz */
 525                 num = 4;
 526                 den = 25;
 527                 break;
 528         }
 529
 530         /* Program numerator and denumerator registers */
 531         reg = __raw_readl(base + INCREMENTER_NUMERATOR_OFFSET) &
 532                         NUMERATOR_DENUMERATOR_MASK;
 533         reg |= num;
 534         __raw_writel(reg, base + INCREMENTER_NUMERATOR_OFFSET);
 535
 536         reg = __raw_readl(base + INCREMENTER_NUMERATOR_OFFSET) &
 537                         NUMERATOR_DENUMERATOR_MASK;
 538         reg |= den;
 539         __raw_writel(reg, base + INCREMENTER_DENUMERATOR_RELOAD_OFFSET);
 540
 541         iounmap(base);
 542 }
 543 #else
 544 static inline void __init realtime_counter_init(void)
 545 {}
 546 #endif
 547
 548 #define OMAP_SYS_GP_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop,   \
 549                                clksrc_nr, clksrc_src, clksrc_prop)      \
 550 void __init omap##name##_gptimer_timer_init(void)                       \
 551 {                                                                       \
 552         if (omap_clk_init)                                              \
 553                 omap_clk_init();                                        \
 554         omap_dmtimer_init();                                            \
 555         omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop);    \
 556         omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src,         \
 557                                         clksrc_prop);                   \
 558 }
 559
 560 #define OMAP_SYS_32K_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop,  \
 561                                 clksrc_nr, clksrc_src, clksrc_prop)     \
 562 void __init omap##name##_sync32k_timer_init(void)               \
 563 {                                                                       \
 564         if (omap_clk_init)                                              \
 565                 omap_clk_init();                                        \
 566         omap_dmtimer_init();                                            \
 567         omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop);    \
 568         /* Enable the use of clocksource="gp_timer" kernel parameter */ \
 569         if (use_gptimer_clksrc)                                         \
 570                 omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src, \
 571                                                 clksrc_prop);           \
 572         else                                                            \
 573                 omap2_sync32k_clocksource_init();                       \
 574 }
 575
 576 #ifdef CONFIG_ARCH_OMAP2
 577 OMAP_SYS_32K_TIMER_INIT(2, 1, "timer_32k_ck", "ti,timer-alwon",
 578                         2, "timer_sys_ck", NULL);
 579 #endif /* CONFIG_ARCH_OMAP2 */
 580
 581 #ifdef CONFIG_ARCH_OMAP3
 582 OMAP_SYS_32K_TIMER_INIT(3, 1, "timer_32k_ck", "ti,timer-alwon",
 583                         2, "timer_sys_ck", NULL);
 584 OMAP_SYS_32K_TIMER_INIT(3_secure, 12, "secure_32k_fck", "ti,timer-secure",
 585                         2, "timer_sys_ck", NULL);
 586 #endif /* CONFIG_ARCH_OMAP3 */
 587
 588 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX)
 589 OMAP_SYS_GP_TIMER_INIT(3, 2, "timer_sys_ck", NULL,
 590                        1, "timer_sys_ck", "ti,timer-alwon");
 591 #endif
 592
 593 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
 594 static OMAP_SYS_32K_TIMER_INIT(4, 1, "timer_32k_ck", "ti,timer-alwon",
 595                                2, "sys_clkin_ck", NULL);
 596 #endif
 597
 598 #ifdef CONFIG_ARCH_OMAP4
 599 #ifdef CONFIG_LOCAL_TIMERS
 600 static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, OMAP44XX_LOCAL_TWD_BASE, 29);
 601 void __init omap4_local_timer_init(void)
 602 {
 603         omap4_sync32k_timer_init();
 604         /* Local timers are not supprted on OMAP4430 ES1.0 */
 605         if (omap_rev() != OMAP4430_REV_ES1_0) {
 606                 int err;
 607
 608                 if (of_have_populated_dt()) {
 609                         clocksource_of_init();
 610                         return;
 611                 }
 612
 613                 err = twd_local_timer_register(&twd_local_timer);
 614                 if (err)
 615                         pr_err("twd_local_timer_register failed %d\n", err);
 616         }
 617 }
 618 #else /* CONFIG_LOCAL_TIMERS */
 619 void __init omap4_local_timer_init(void)
 620 {
 621         omap4_sync32k_timer_init();
 622 }
 623 #endif /* CONFIG_LOCAL_TIMERS */
 624 #endif /* CONFIG_ARCH_OMAP4 */
 625
 626 #ifdef CONFIG_SOC_OMAP5
 627 void __init omap5_realtime_timer_init(void)
 628 {
 629         int err;
 630
 631         omap4_sync32k_timer_init();
 632         realtime_counter_init();
 633
 634         err = arch_timer_of_register();
 635         if (err)
 636                 pr_err("%s: arch_timer_register failed %d\n", __func__, err);
 637 }
 638 #endif /* CONFIG_SOC_OMAP5 */
 639
 640 /**
 641  * omap_timer_init - build and register timer device with an
 642  * associated timer hwmod
 643  * @oh: timer hwmod pointer to be used to build timer device
 644  * @user:       parameter that can be passed from calling hwmod API
 645  *
 646  * Called by omap_hwmod_for_each_by_class to register each of the timer
 647  * devices present in the system. The number of timer devices is known
 648  * by parsing through the hwmod database for a given class name. At the
 649  * end of function call memory is allocated for timer device and it is
 650  * registered to the framework ready to be proved by the driver.
 651  */
 652 static int __init omap_timer_init(struct omap_hwmod *oh, void *unused)
 653 {
 654         int id;
 655         int ret = 0;
 656         char *name = "omap_timer";
 657         struct dmtimer_platform_data *pdata;
 658         struct platform_device *pdev;
 659         struct omap_timer_capability_dev_attr *timer_dev_attr;
 660
 661         pr_debug("%s: %s\n", __func__, oh->name);
 662
 663         /* on secure device, do not register secure timer */
 664         timer_dev_attr = oh->dev_attr;
 665         if (omap_type() != OMAP2_DEVICE_TYPE_GP && timer_dev_attr)
 666                 if (timer_dev_attr->timer_capability == OMAP_TIMER_SECURE)
 667                         return ret;
 668
 669         pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
 670         if (!pdata) {
 671                 pr_err("%s: No memory for [%s]\n", __func__, oh->name);
 672                 return -ENOMEM;
 673         }
 674
 675         /*
 676          * Extract the IDs from name field in hwmod database
 677          * and use the same for constructing ids' for the
 678          * timer devices. In a way, we are avoiding usage of
 679          * static variable witin the function to do the same.
 680          * CAUTION: We have to be careful and make sure the
 681          * name in hwmod database does not change in which case
 682          * we might either make corresponding change here or
 683          * switch back static variable mechanism.
 684          */
 685         sscanf(oh->name, "timer%2d", &id);
 686
 687         if (timer_dev_attr)
 688                 pdata->timer_capability = timer_dev_attr->timer_capability;
 689
 690         pdata->timer_errata = omap_dm_timer_get_errata();
 691         pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
 692
 693         pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata));
 694
 695         if (IS_ERR(pdev)) {
 696                 pr_err("%s: Can't build omap_device for %s: %s.\n",
 697                         __func__, name, oh->name);
 698                 ret = -EINVAL;
 699         }
 700
 701         kfree(pdata);
 702
 703         return ret;
 704 }
 705
 706 /**
 707  * omap2_dm_timer_init - top level regular device initialization
 708  *
 709  * Uses dedicated hwmod api to parse through hwmod database for
 710  * given class name and then build and register the timer device.
 711  */
 712 static int __init omap2_dm_timer_init(void)
 713 {
 714         int ret;
 715
 716         /* If dtb is there, the devices will be created dynamically */
 717         if (of_have_populated_dt())
 718                 return -ENODEV;
 719
 720         ret = omap_hwmod_for_each_by_class("timer", omap_timer_init, NULL);
 721         if (unlikely(ret)) {
 722                 pr_err("%s: device registration failed.\n", __func__);
 723                 return -EINVAL;
 724         }
 725
 726         return 0;
 727 }
 728 omap_arch_initcall(omap2_dm_timer_init);
 729
 730 /**
 731  * omap2_override_clocksource - clocksource override with user configuration
 732  *
 733  * Allows user to override default clocksource, using kernel parameter
 734  *   clocksource="gp_timer"     (For all OMAP2PLUS architectures)
 735  *
 736  * Note that, here we are using same standard kernel parameter "clocksource=",
 737  * and not introducing any OMAP specific interface.
 738  */
 739 static int __init omap2_override_clocksource(char *str)
 740 {
 741         if (!str)
 742                 return 0;
 743         /*
 744          * For OMAP architecture, we only have two options
 745          *    - sync_32k (default)
 746          *    - gp_timer (sys_clk based)
 747          */
 748         if (!strcmp(str, "gp_timer"))
 749                 use_gptimer_clksrc = true;
 750
 751         return 0;
 752 }
 753 early_param("clocksource", omap2_override_clocksource);