1 /* linux/arch/arm/plat-samsung/devs.c
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * Base SAMSUNG platform device definitions
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/amba/pl330.h>
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/timer.h>
19 #include <linux/init.h>
20 #include <linux/serial_core.h>
21 #include <linux/platform_device.h>
23 #include <linux/slab.h>
24 #include <linux/string.h>
25 #include <linux/dma-mapping.h>
27 #include <linux/gfp.h>
28 #include <linux/mtd/mtd.h>
29 #include <linux/mtd/onenand.h>
30 #include <linux/mtd/partitions.h>
31 #include <linux/mmc/host.h>
32 #include <linux/ioport.h>
33 #include <linux/platform_data/s3c-hsudc.h>
34 #include <linux/platform_data/s3c-hsotg.h>
36 #include <media/s5p_hdmi.h>
39 #include <asm/mach/arch.h>
40 #include <asm/mach/map.h>
41 #include <asm/mach/irq.h>
43 #include <mach/hardware.h>
45 #include <mach/irqs.h>
49 #include <plat/devs.h>
51 #include <linux/platform_data/ata-samsung_cf.h>
53 #include <plat/fb-s3c2410.h>
54 #include <plat/hdmi.h>
55 #include <linux/platform_data/hwmon-s3c.h>
56 #include <linux/platform_data/i2c-s3c2410.h>
57 #include <plat/keypad.h>
58 #include <linux/platform_data/mmc-s3cmci.h>
59 #include <linux/platform_data/mtd-nand-s3c2410.h>
60 #include <plat/pwm-core.h>
61 #include <plat/sdhci.h>
62 #include <linux/platform_data/touchscreen-s3c2410.h>
63 #include <linux/platform_data/usb-s3c2410_udc.h>
64 #include <linux/platform_data/usb-ohci-s3c2410.h>
65 #include <plat/usb-phy.h>
66 #include <plat/regs-serial.h>
67 #include <plat/regs-spi.h>
68 #include <linux/platform_data/spi-s3c64xx.h>
70 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
73 #ifdef CONFIG_CPU_S3C2440
74 static struct resource s3c_ac97_resource[] = {
75 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
76 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
77 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
78 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
79 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
82 struct platform_device s3c_device_ac97 = {
83 .name = "samsung-ac97",
85 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
86 .resource = s3c_ac97_resource,
88 .dma_mask = &samsung_device_dma_mask,
89 .coherent_dma_mask = DMA_BIT_MASK(32),
92 #endif /* CONFIG_CPU_S3C2440 */
96 #ifdef CONFIG_PLAT_S3C24XX
97 static struct resource s3c_adc_resource[] = {
98 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
99 [1] = DEFINE_RES_IRQ(IRQ_TC),
100 [2] = DEFINE_RES_IRQ(IRQ_ADC),
103 struct platform_device s3c_device_adc = {
104 .name = "s3c24xx-adc",
106 .num_resources = ARRAY_SIZE(s3c_adc_resource),
107 .resource = s3c_adc_resource,
109 #endif /* CONFIG_PLAT_S3C24XX */
111 #if defined(CONFIG_SAMSUNG_DEV_ADC)
112 static struct resource s3c_adc_resource[] = {
113 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
114 [1] = DEFINE_RES_IRQ(IRQ_TC),
115 [2] = DEFINE_RES_IRQ(IRQ_ADC),
118 struct platform_device s3c_device_adc = {
119 .name = "samsung-adc",
121 .num_resources = ARRAY_SIZE(s3c_adc_resource),
122 .resource = s3c_adc_resource,
124 #endif /* CONFIG_SAMSUNG_DEV_ADC */
126 /* Camif Controller */
128 #ifdef CONFIG_CPU_S3C2440
129 static struct resource s3c_camif_resource[] = {
130 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
131 [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
132 [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
135 struct platform_device s3c_device_camif = {
136 .name = "s3c2440-camif",
138 .num_resources = ARRAY_SIZE(s3c_camif_resource),
139 .resource = s3c_camif_resource,
141 .dma_mask = &samsung_device_dma_mask,
142 .coherent_dma_mask = DMA_BIT_MASK(32),
145 #endif /* CONFIG_CPU_S3C2440 */
149 #ifdef CONFIG_PLAT_S5P
150 static struct resource samsung_asoc_idma_resource = DEFINE_RES_IRQ(IRQ_I2S0);
152 struct platform_device samsung_asoc_idma = {
153 .name = "samsung-idma",
156 .resource = &samsung_asoc_idma_resource,
158 .dma_mask = &samsung_device_dma_mask,
159 .coherent_dma_mask = DMA_BIT_MASK(32),
166 #ifdef CONFIG_S3C_DEV_FB
167 static struct resource s3c_fb_resource[] = {
168 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
169 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
170 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
171 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
174 struct platform_device s3c_device_fb = {
177 .num_resources = ARRAY_SIZE(s3c_fb_resource),
178 .resource = s3c_fb_resource,
180 .dma_mask = &samsung_device_dma_mask,
181 .coherent_dma_mask = DMA_BIT_MASK(32),
185 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
187 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
190 #endif /* CONFIG_S3C_DEV_FB */
194 #ifdef CONFIG_S5P_DEV_FIMC0
195 static struct resource s5p_fimc0_resource[] = {
196 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
197 [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
200 struct platform_device s5p_device_fimc0 = {
203 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
204 .resource = s5p_fimc0_resource,
206 .dma_mask = &samsung_device_dma_mask,
207 .coherent_dma_mask = DMA_BIT_MASK(32),
211 struct platform_device s5p_device_fimc_md = {
212 .name = "s5p-fimc-md",
215 #endif /* CONFIG_S5P_DEV_FIMC0 */
217 #ifdef CONFIG_S5P_DEV_FIMC1
218 static struct resource s5p_fimc1_resource[] = {
219 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
220 [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
223 struct platform_device s5p_device_fimc1 = {
226 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
227 .resource = s5p_fimc1_resource,
229 .dma_mask = &samsung_device_dma_mask,
230 .coherent_dma_mask = DMA_BIT_MASK(32),
233 #endif /* CONFIG_S5P_DEV_FIMC1 */
235 #ifdef CONFIG_S5P_DEV_FIMC2
236 static struct resource s5p_fimc2_resource[] = {
237 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
238 [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
241 struct platform_device s5p_device_fimc2 = {
244 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
245 .resource = s5p_fimc2_resource,
247 .dma_mask = &samsung_device_dma_mask,
248 .coherent_dma_mask = DMA_BIT_MASK(32),
251 #endif /* CONFIG_S5P_DEV_FIMC2 */
253 #ifdef CONFIG_S5P_DEV_FIMC3
254 static struct resource s5p_fimc3_resource[] = {
255 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
256 [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
259 struct platform_device s5p_device_fimc3 = {
262 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
263 .resource = s5p_fimc3_resource,
265 .dma_mask = &samsung_device_dma_mask,
266 .coherent_dma_mask = DMA_BIT_MASK(32),
269 #endif /* CONFIG_S5P_DEV_FIMC3 */
273 #ifdef CONFIG_S5P_DEV_G2D
274 static struct resource s5p_g2d_resource[] = {
275 [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
276 [1] = DEFINE_RES_IRQ(IRQ_2D),
279 struct platform_device s5p_device_g2d = {
282 .num_resources = ARRAY_SIZE(s5p_g2d_resource),
283 .resource = s5p_g2d_resource,
285 .dma_mask = &samsung_device_dma_mask,
286 .coherent_dma_mask = DMA_BIT_MASK(32),
289 #endif /* CONFIG_S5P_DEV_G2D */
291 #ifdef CONFIG_S5P_DEV_JPEG
292 static struct resource s5p_jpeg_resource[] = {
293 [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
294 [1] = DEFINE_RES_IRQ(IRQ_JPEG),
297 struct platform_device s5p_device_jpeg = {
300 .num_resources = ARRAY_SIZE(s5p_jpeg_resource),
301 .resource = s5p_jpeg_resource,
303 .dma_mask = &samsung_device_dma_mask,
304 .coherent_dma_mask = DMA_BIT_MASK(32),
307 #endif /* CONFIG_S5P_DEV_JPEG */
311 #ifdef CONFIG_S5P_DEV_FIMD0
312 static struct resource s5p_fimd0_resource[] = {
313 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
314 [1] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_VSYNC, "vsync"),
315 [2] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_FIFO, "fifo"),
316 [3] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_SYSTEM, "lcd_sys"),
319 struct platform_device s5p_device_fimd0 = {
322 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
323 .resource = s5p_fimd0_resource,
325 .dma_mask = &samsung_device_dma_mask,
326 .coherent_dma_mask = DMA_BIT_MASK(32),
330 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
332 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
335 #endif /* CONFIG_S5P_DEV_FIMD0 */
339 #ifdef CONFIG_S3C_DEV_HWMON
340 struct platform_device s3c_device_hwmon = {
343 .dev.parent = &s3c_device_adc.dev,
346 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
348 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
351 #endif /* CONFIG_S3C_DEV_HWMON */
355 #ifdef CONFIG_S3C_DEV_HSMMC
356 static struct resource s3c_hsmmc_resource[] = {
357 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
358 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
361 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
363 .host_caps = (MMC_CAP_4_BIT_DATA |
364 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
367 struct platform_device s3c_device_hsmmc0 = {
370 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
371 .resource = s3c_hsmmc_resource,
373 .dma_mask = &samsung_device_dma_mask,
374 .coherent_dma_mask = DMA_BIT_MASK(32),
375 .platform_data = &s3c_hsmmc0_def_platdata,
379 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
381 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
383 #endif /* CONFIG_S3C_DEV_HSMMC */
385 #ifdef CONFIG_S3C_DEV_HSMMC1
386 static struct resource s3c_hsmmc1_resource[] = {
387 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
388 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
391 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
393 .host_caps = (MMC_CAP_4_BIT_DATA |
394 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
397 struct platform_device s3c_device_hsmmc1 = {
400 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
401 .resource = s3c_hsmmc1_resource,
403 .dma_mask = &samsung_device_dma_mask,
404 .coherent_dma_mask = DMA_BIT_MASK(32),
405 .platform_data = &s3c_hsmmc1_def_platdata,
409 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
411 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
413 #endif /* CONFIG_S3C_DEV_HSMMC1 */
417 #ifdef CONFIG_S3C_DEV_HSMMC2
418 static struct resource s3c_hsmmc2_resource[] = {
419 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
420 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
423 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
425 .host_caps = (MMC_CAP_4_BIT_DATA |
426 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
429 struct platform_device s3c_device_hsmmc2 = {
432 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
433 .resource = s3c_hsmmc2_resource,
435 .dma_mask = &samsung_device_dma_mask,
436 .coherent_dma_mask = DMA_BIT_MASK(32),
437 .platform_data = &s3c_hsmmc2_def_platdata,
441 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
443 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
445 #endif /* CONFIG_S3C_DEV_HSMMC2 */
447 #ifdef CONFIG_S3C_DEV_HSMMC3
448 static struct resource s3c_hsmmc3_resource[] = {
449 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
450 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
453 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
455 .host_caps = (MMC_CAP_4_BIT_DATA |
456 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
459 struct platform_device s3c_device_hsmmc3 = {
462 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
463 .resource = s3c_hsmmc3_resource,
465 .dma_mask = &samsung_device_dma_mask,
466 .coherent_dma_mask = DMA_BIT_MASK(32),
467 .platform_data = &s3c_hsmmc3_def_platdata,
471 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
473 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
475 #endif /* CONFIG_S3C_DEV_HSMMC3 */
479 static struct resource s3c_i2c0_resource[] = {
480 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
481 [1] = DEFINE_RES_IRQ(IRQ_IIC),
484 struct platform_device s3c_device_i2c0 = {
485 .name = "s3c2410-i2c",
487 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
488 .resource = s3c_i2c0_resource,
491 struct s3c2410_platform_i2c default_i2c_data __initdata = {
494 .frequency = 100*1000,
498 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
500 struct s3c2410_platform_i2c *npd;
503 pd = &default_i2c_data;
507 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
511 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
514 #ifdef CONFIG_S3C_DEV_I2C1
515 static struct resource s3c_i2c1_resource[] = {
516 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
517 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
520 struct platform_device s3c_device_i2c1 = {
521 .name = "s3c2410-i2c",
523 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
524 .resource = s3c_i2c1_resource,
527 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
529 struct s3c2410_platform_i2c *npd;
532 pd = &default_i2c_data;
536 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
540 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
542 #endif /* CONFIG_S3C_DEV_I2C1 */
544 #ifdef CONFIG_S3C_DEV_I2C2
545 static struct resource s3c_i2c2_resource[] = {
546 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
547 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
550 struct platform_device s3c_device_i2c2 = {
551 .name = "s3c2410-i2c",
553 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
554 .resource = s3c_i2c2_resource,
557 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
559 struct s3c2410_platform_i2c *npd;
562 pd = &default_i2c_data;
566 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
570 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
572 #endif /* CONFIG_S3C_DEV_I2C2 */
574 #ifdef CONFIG_S3C_DEV_I2C3
575 static struct resource s3c_i2c3_resource[] = {
576 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
577 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
580 struct platform_device s3c_device_i2c3 = {
581 .name = "s3c2440-i2c",
583 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
584 .resource = s3c_i2c3_resource,
587 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
589 struct s3c2410_platform_i2c *npd;
592 pd = &default_i2c_data;
596 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
600 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
602 #endif /*CONFIG_S3C_DEV_I2C3 */
604 #ifdef CONFIG_S3C_DEV_I2C4
605 static struct resource s3c_i2c4_resource[] = {
606 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
607 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
610 struct platform_device s3c_device_i2c4 = {
611 .name = "s3c2440-i2c",
613 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
614 .resource = s3c_i2c4_resource,
617 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
619 struct s3c2410_platform_i2c *npd;
622 pd = &default_i2c_data;
626 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
630 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
632 #endif /*CONFIG_S3C_DEV_I2C4 */
634 #ifdef CONFIG_S3C_DEV_I2C5
635 static struct resource s3c_i2c5_resource[] = {
636 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
637 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
640 struct platform_device s3c_device_i2c5 = {
641 .name = "s3c2440-i2c",
643 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
644 .resource = s3c_i2c5_resource,
647 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
649 struct s3c2410_platform_i2c *npd;
652 pd = &default_i2c_data;
656 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
660 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
662 #endif /*CONFIG_S3C_DEV_I2C5 */
664 #ifdef CONFIG_S3C_DEV_I2C6
665 static struct resource s3c_i2c6_resource[] = {
666 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
667 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
670 struct platform_device s3c_device_i2c6 = {
671 .name = "s3c2440-i2c",
673 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
674 .resource = s3c_i2c6_resource,
677 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
679 struct s3c2410_platform_i2c *npd;
682 pd = &default_i2c_data;
686 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
690 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
692 #endif /* CONFIG_S3C_DEV_I2C6 */
694 #ifdef CONFIG_S3C_DEV_I2C7
695 static struct resource s3c_i2c7_resource[] = {
696 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
697 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
700 struct platform_device s3c_device_i2c7 = {
701 .name = "s3c2440-i2c",
703 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
704 .resource = s3c_i2c7_resource,
707 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
709 struct s3c2410_platform_i2c *npd;
712 pd = &default_i2c_data;
716 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
720 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
722 #endif /* CONFIG_S3C_DEV_I2C7 */
726 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
727 static struct resource s5p_i2c_resource[] = {
728 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
729 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
732 struct platform_device s5p_device_i2c_hdmiphy = {
733 .name = "s3c2440-hdmiphy-i2c",
735 .num_resources = ARRAY_SIZE(s5p_i2c_resource),
736 .resource = s5p_i2c_resource,
739 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
741 struct s3c2410_platform_i2c *npd;
744 pd = &default_i2c_data;
746 if (soc_is_exynos4210() ||
747 soc_is_exynos4212() || soc_is_exynos4412())
749 else if (soc_is_s5pv210())
755 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
756 &s5p_device_i2c_hdmiphy);
759 static struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
761 void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
762 struct i2c_board_info *mhl_info, int mhl_bus)
764 struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
766 if (soc_is_exynos4210() ||
767 soc_is_exynos4212() || soc_is_exynos4412())
769 else if (soc_is_s5pv210())
774 pd->hdmiphy_info = hdmiphy_info;
775 pd->mhl_info = mhl_info;
776 pd->mhl_bus = mhl_bus;
778 s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
782 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
786 #ifdef CONFIG_PLAT_S3C24XX
787 static struct resource s3c_iis_resource[] = {
788 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
791 struct platform_device s3c_device_iis = {
792 .name = "s3c24xx-iis",
794 .num_resources = ARRAY_SIZE(s3c_iis_resource),
795 .resource = s3c_iis_resource,
797 .dma_mask = &samsung_device_dma_mask,
798 .coherent_dma_mask = DMA_BIT_MASK(32),
801 #endif /* CONFIG_PLAT_S3C24XX */
805 #ifdef CONFIG_SAMSUNG_DEV_IDE
806 static struct resource s3c_cfcon_resource[] = {
807 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
808 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
811 struct platform_device s3c_device_cfcon = {
813 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
814 .resource = s3c_cfcon_resource,
817 void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
819 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
822 #endif /* CONFIG_SAMSUNG_DEV_IDE */
826 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
827 static struct resource samsung_keypad_resources[] = {
828 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
829 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
832 struct platform_device samsung_device_keypad = {
833 .name = "samsung-keypad",
835 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
836 .resource = samsung_keypad_resources,
839 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
841 struct samsung_keypad_platdata *npd;
843 npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
844 &samsung_device_keypad);
847 npd->cfg_gpio = samsung_keypad_cfg_gpio;
849 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
853 #ifdef CONFIG_PLAT_S3C24XX
854 static struct resource s3c_lcd_resource[] = {
855 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
856 [1] = DEFINE_RES_IRQ(IRQ_LCD),
859 struct platform_device s3c_device_lcd = {
860 .name = "s3c2410-lcd",
862 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
863 .resource = s3c_lcd_resource,
865 .dma_mask = &samsung_device_dma_mask,
866 .coherent_dma_mask = DMA_BIT_MASK(32),
870 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
872 struct s3c2410fb_mach_info *npd;
874 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
876 npd->displays = kmemdup(pd->displays,
877 sizeof(struct s3c2410fb_display) * npd->num_displays,
880 printk(KERN_ERR "no memory for LCD display data\n");
882 printk(KERN_ERR "no memory for LCD platform data\n");
885 #endif /* CONFIG_PLAT_S3C24XX */
889 #ifdef CONFIG_S5P_DEV_CSIS0
890 static struct resource s5p_mipi_csis0_resource[] = {
891 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
892 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
895 struct platform_device s5p_device_mipi_csis0 = {
896 .name = "s5p-mipi-csis",
898 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
899 .resource = s5p_mipi_csis0_resource,
901 #endif /* CONFIG_S5P_DEV_CSIS0 */
903 #ifdef CONFIG_S5P_DEV_CSIS1
904 static struct resource s5p_mipi_csis1_resource[] = {
905 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
906 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
909 struct platform_device s5p_device_mipi_csis1 = {
910 .name = "s5p-mipi-csis",
912 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
913 .resource = s5p_mipi_csis1_resource,
919 #ifdef CONFIG_S3C_DEV_NAND
920 static struct resource s3c_nand_resource[] = {
921 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
924 struct platform_device s3c_device_nand = {
925 .name = "s3c2410-nand",
927 .num_resources = ARRAY_SIZE(s3c_nand_resource),
928 .resource = s3c_nand_resource,
932 * s3c_nand_copy_set() - copy nand set data
933 * @set: The new structure, directly copied from the old.
935 * Copy all the fields from the NAND set field from what is probably __initdata
936 * to new kernel memory. The code returns 0 if the copy happened correctly or
937 * an error code for the calling function to display.
939 * Note, we currently do not try and look to see if we've already copied the
940 * data in a previous set.
942 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
947 size = sizeof(struct mtd_partition) * set->nr_partitions;
949 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
950 set->partitions = ptr;
956 if (set->nr_map && set->nr_chips) {
957 size = sizeof(int) * set->nr_chips;
958 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
965 if (set->ecc_layout) {
966 ptr = kmemdup(set->ecc_layout,
967 sizeof(struct nand_ecclayout), GFP_KERNEL);
968 set->ecc_layout = ptr;
977 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
979 struct s3c2410_platform_nand *npd;
983 /* note, if we get a failure in allocation, we simply drop out of the
984 * function. If there is so little memory available at initialisation
985 * time then there is little chance the system is going to run.
988 npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
993 /* now see if we need to copy any of the nand set data */
995 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
997 struct s3c2410_nand_set *from = npd->sets;
998 struct s3c2410_nand_set *to;
1001 to = kmemdup(from, size, GFP_KERNEL);
1002 npd->sets = to; /* set, even if we failed */
1005 printk(KERN_ERR "%s: no memory for sets\n", __func__);
1009 for (i = 0; i < npd->nr_sets; i++) {
1010 ret = s3c_nand_copy_set(to);
1012 printk(KERN_ERR "%s: failed to copy set %d\n",
1020 #endif /* CONFIG_S3C_DEV_NAND */
1024 #ifdef CONFIG_S3C_DEV_ONENAND
1025 static struct resource s3c_onenand_resources[] = {
1026 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1027 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1028 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1031 struct platform_device s3c_device_onenand = {
1032 .name = "samsung-onenand",
1034 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
1035 .resource = s3c_onenand_resources,
1037 #endif /* CONFIG_S3C_DEV_ONENAND */
1039 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1040 static struct resource s3c64xx_onenand1_resources[] = {
1041 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1042 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1043 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1046 struct platform_device s3c64xx_device_onenand1 = {
1047 .name = "samsung-onenand",
1049 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
1050 .resource = s3c64xx_onenand1_resources,
1053 void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1055 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1056 &s3c64xx_device_onenand1);
1058 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1060 #ifdef CONFIG_S5P_DEV_ONENAND
1061 static struct resource s5p_onenand_resources[] = {
1062 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1063 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1064 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1067 struct platform_device s5p_device_onenand = {
1068 .name = "s5pc110-onenand",
1070 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
1071 .resource = s5p_onenand_resources,
1073 #endif /* CONFIG_S5P_DEV_ONENAND */
1077 #if defined(CONFIG_PLAT_S5P) && !defined(CONFIG_ARCH_EXYNOS)
1078 static struct resource s5p_pmu_resource[] = {
1079 DEFINE_RES_IRQ(IRQ_PMU)
1082 static struct platform_device s5p_device_pmu = {
1085 .num_resources = ARRAY_SIZE(s5p_pmu_resource),
1086 .resource = s5p_pmu_resource,
1089 static int __init s5p_pmu_init(void)
1091 platform_device_register(&s5p_device_pmu);
1094 arch_initcall(s5p_pmu_init);
1095 #endif /* CONFIG_PLAT_S5P */
1099 #ifdef CONFIG_SAMSUNG_DEV_PWM
1100 static struct resource samsung_pwm_resource[] = {
1101 DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
1104 struct platform_device samsung_device_pwm = {
1105 .name = "samsung-pwm",
1107 .num_resources = ARRAY_SIZE(samsung_pwm_resource),
1108 .resource = samsung_pwm_resource,
1111 void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
1113 samsung_device_pwm.dev.platform_data = pd;
1115 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1119 #ifdef CONFIG_PLAT_S3C24XX
1120 static struct resource s3c_rtc_resource[] = {
1121 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1122 [1] = DEFINE_RES_IRQ(IRQ_RTC),
1123 [2] = DEFINE_RES_IRQ(IRQ_TICK),
1126 struct platform_device s3c_device_rtc = {
1127 .name = "s3c2410-rtc",
1129 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1130 .resource = s3c_rtc_resource,
1132 #endif /* CONFIG_PLAT_S3C24XX */
1134 #ifdef CONFIG_S3C_DEV_RTC
1135 static struct resource s3c_rtc_resource[] = {
1136 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1137 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1138 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1141 struct platform_device s3c_device_rtc = {
1142 .name = "s3c64xx-rtc",
1144 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1145 .resource = s3c_rtc_resource,
1147 #endif /* CONFIG_S3C_DEV_RTC */
1151 #ifdef CONFIG_PLAT_S3C24XX
1152 static struct resource s3c_sdi_resource[] = {
1153 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1154 [1] = DEFINE_RES_IRQ(IRQ_SDI),
1157 struct platform_device s3c_device_sdi = {
1158 .name = "s3c2410-sdi",
1160 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
1161 .resource = s3c_sdi_resource,
1164 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1166 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1169 #endif /* CONFIG_PLAT_S3C24XX */
1173 #ifdef CONFIG_PLAT_S3C24XX
1174 static struct resource s3c_spi0_resource[] = {
1175 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1176 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1179 struct platform_device s3c_device_spi0 = {
1180 .name = "s3c2410-spi",
1182 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
1183 .resource = s3c_spi0_resource,
1185 .dma_mask = &samsung_device_dma_mask,
1186 .coherent_dma_mask = DMA_BIT_MASK(32),
1190 static struct resource s3c_spi1_resource[] = {
1191 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1192 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1195 struct platform_device s3c_device_spi1 = {
1196 .name = "s3c2410-spi",
1198 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
1199 .resource = s3c_spi1_resource,
1201 .dma_mask = &samsung_device_dma_mask,
1202 .coherent_dma_mask = DMA_BIT_MASK(32),
1205 #endif /* CONFIG_PLAT_S3C24XX */
1209 #ifdef CONFIG_PLAT_S3C24XX
1210 static struct resource s3c_ts_resource[] = {
1211 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1212 [1] = DEFINE_RES_IRQ(IRQ_TC),
1215 struct platform_device s3c_device_ts = {
1216 .name = "s3c2410-ts",
1218 .dev.parent = &s3c_device_adc.dev,
1219 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1220 .resource = s3c_ts_resource,
1223 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1225 s3c_set_platdata(hard_s3c2410ts_info,
1226 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1228 #endif /* CONFIG_PLAT_S3C24XX */
1230 #ifdef CONFIG_SAMSUNG_DEV_TS
1231 static struct resource s3c_ts_resource[] = {
1232 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1233 [1] = DEFINE_RES_IRQ(IRQ_TC),
1236 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1239 .oversampling_shift = 2,
1242 struct platform_device s3c_device_ts = {
1243 .name = "s3c64xx-ts",
1245 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1246 .resource = s3c_ts_resource,
1249 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1252 pd = &default_ts_data;
1254 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1257 #endif /* CONFIG_SAMSUNG_DEV_TS */
1261 #ifdef CONFIG_S5P_DEV_TV
1263 static struct resource s5p_hdmi_resources[] = {
1264 [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1265 [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1268 struct platform_device s5p_device_hdmi = {
1271 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
1272 .resource = s5p_hdmi_resources,
1275 static struct resource s5p_sdo_resources[] = {
1276 [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1277 [1] = DEFINE_RES_IRQ(IRQ_SDO),
1280 struct platform_device s5p_device_sdo = {
1283 .num_resources = ARRAY_SIZE(s5p_sdo_resources),
1284 .resource = s5p_sdo_resources,
1287 static struct resource s5p_mixer_resources[] = {
1288 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1289 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1290 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1293 struct platform_device s5p_device_mixer = {
1294 .name = "s5p-mixer",
1296 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
1297 .resource = s5p_mixer_resources,
1299 .dma_mask = &samsung_device_dma_mask,
1300 .coherent_dma_mask = DMA_BIT_MASK(32),
1303 #endif /* CONFIG_S5P_DEV_TV */
1307 #ifdef CONFIG_S3C_DEV_USB_HOST
1308 static struct resource s3c_usb_resource[] = {
1309 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1310 [1] = DEFINE_RES_IRQ(IRQ_USBH),
1313 struct platform_device s3c_device_ohci = {
1314 .name = "s3c2410-ohci",
1316 .num_resources = ARRAY_SIZE(s3c_usb_resource),
1317 .resource = s3c_usb_resource,
1319 .dma_mask = &samsung_device_dma_mask,
1320 .coherent_dma_mask = DMA_BIT_MASK(32),
1325 * s3c_ohci_set_platdata - initialise OHCI device platform data
1326 * @info: The platform data.
1328 * This call copies the @info passed in and sets the device .platform_data
1329 * field to that copy. The @info is copied so that the original can be marked
1333 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1335 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1338 #endif /* CONFIG_S3C_DEV_USB_HOST */
1340 /* USB Device (Gadget) */
1342 #ifdef CONFIG_PLAT_S3C24XX
1343 static struct resource s3c_usbgadget_resource[] = {
1344 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1345 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1348 struct platform_device s3c_device_usbgadget = {
1349 .name = "s3c2410-usbgadget",
1351 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1352 .resource = s3c_usbgadget_resource,
1355 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1357 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1359 #endif /* CONFIG_PLAT_S3C24XX */
1363 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1364 static struct resource s3c_usb_hsotg_resources[] = {
1365 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1366 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1369 struct platform_device s3c_device_usb_hsotg = {
1370 .name = "s3c-hsotg",
1372 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1373 .resource = s3c_usb_hsotg_resources,
1375 .dma_mask = &samsung_device_dma_mask,
1376 .coherent_dma_mask = DMA_BIT_MASK(32),
1380 void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
1382 struct s3c_hsotg_plat *npd;
1384 npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
1385 &s3c_device_usb_hsotg);
1388 npd->phy_init = s5p_usb_phy_init;
1390 npd->phy_exit = s5p_usb_phy_exit;
1392 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1394 /* USB High Spped 2.0 Device (Gadget) */
1396 #ifdef CONFIG_PLAT_S3C24XX
1397 static struct resource s3c_hsudc_resource[] = {
1398 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1399 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1402 struct platform_device s3c_device_usb_hsudc = {
1403 .name = "s3c-hsudc",
1405 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1406 .resource = s3c_hsudc_resource,
1408 .dma_mask = &samsung_device_dma_mask,
1409 .coherent_dma_mask = DMA_BIT_MASK(32),
1413 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1415 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1417 #endif /* CONFIG_PLAT_S3C24XX */
1421 #ifdef CONFIG_S3C_DEV_WDT
1422 static struct resource s3c_wdt_resource[] = {
1423 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1424 [1] = DEFINE_RES_IRQ(IRQ_WDT),
1427 struct platform_device s3c_device_wdt = {
1428 .name = "s3c2410-wdt",
1430 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1431 .resource = s3c_wdt_resource,
1433 #endif /* CONFIG_S3C_DEV_WDT */
1435 #ifdef CONFIG_S3C64XX_DEV_SPI0
1436 static struct resource s3c64xx_spi0_resource[] = {
1437 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1438 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1439 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1440 [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1443 struct platform_device s3c64xx_device_spi0 = {
1444 .name = "s3c6410-spi",
1446 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1447 .resource = s3c64xx_spi0_resource,
1449 .dma_mask = &samsung_device_dma_mask,
1450 .coherent_dma_mask = DMA_BIT_MASK(32),
1454 void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1457 struct s3c64xx_spi_info pd;
1459 /* Reject invalid configuration */
1460 if (!num_cs || src_clk_nr < 0) {
1461 pr_err("%s: Invalid SPI configuration\n", __func__);
1466 pd.src_clk_nr = src_clk_nr;
1467 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
1468 #ifdef CONFIG_PL330_DMA
1469 pd.filter = pl330_filter;
1472 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
1474 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1476 #ifdef CONFIG_S3C64XX_DEV_SPI1
1477 static struct resource s3c64xx_spi1_resource[] = {
1478 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1479 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1480 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1481 [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1484 struct platform_device s3c64xx_device_spi1 = {
1485 .name = "s3c6410-spi",
1487 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1488 .resource = s3c64xx_spi1_resource,
1490 .dma_mask = &samsung_device_dma_mask,
1491 .coherent_dma_mask = DMA_BIT_MASK(32),
1495 void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1498 struct s3c64xx_spi_info pd;
1500 /* Reject invalid configuration */
1501 if (!num_cs || src_clk_nr < 0) {
1502 pr_err("%s: Invalid SPI configuration\n", __func__);
1507 pd.src_clk_nr = src_clk_nr;
1508 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
1509 #ifdef CONFIG_PL330_DMA
1510 pd.filter = pl330_filter;
1513 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
1515 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1517 #ifdef CONFIG_S3C64XX_DEV_SPI2
1518 static struct resource s3c64xx_spi2_resource[] = {
1519 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1520 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1521 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1522 [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1525 struct platform_device s3c64xx_device_spi2 = {
1526 .name = "s3c6410-spi",
1528 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1529 .resource = s3c64xx_spi2_resource,
1531 .dma_mask = &samsung_device_dma_mask,
1532 .coherent_dma_mask = DMA_BIT_MASK(32),
1536 void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1539 struct s3c64xx_spi_info pd;
1541 /* Reject invalid configuration */
1542 if (!num_cs || src_clk_nr < 0) {
1543 pr_err("%s: Invalid SPI configuration\n", __func__);
1548 pd.src_clk_nr = src_clk_nr;
1549 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
1550 #ifdef CONFIG_PL330_DMA
1551 pd.filter = pl330_filter;
1554 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
1556 #endif /* CONFIG_S3C64XX_DEV_SPI2 */