2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/sched.h>
9 #include <linux/interrupt.h>
10 #include <linux/seq_file.h>
11 #include <linux/debugfs.h>
12 #include <linux/pfn.h>
13 #include <linux/percpu.h>
14 #include <linux/gfp.h>
15 #include <linux/pci.h>
16 #include <linux/vmalloc.h>
19 #include <asm/processor.h>
20 #include <asm/tlbflush.h>
21 #include <asm/sections.h>
22 #include <asm/setup.h>
23 #include <asm/uaccess.h>
24 #include <asm/pgalloc.h>
25 #include <asm/proto.h>
29 * The current flushing context - we pass it instead of 5 arguments:
36 unsigned long numpages;
39 unsigned force_split : 1;
45 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
46 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
47 * entries change the page attribute in parallel to some other cpu
48 * splitting a large page entry along with changing the attribute.
50 static DEFINE_SPINLOCK(cpa_lock);
52 #define CPA_FLUSHTLB 1
54 #define CPA_PAGES_ARRAY 4
57 static unsigned long direct_pages_count[PG_LEVEL_NUM];
59 void update_page_count(int level, unsigned long pages)
61 /* Protect against CPA */
63 direct_pages_count[level] += pages;
64 spin_unlock(&pgd_lock);
67 static void split_page_count(int level)
69 if (direct_pages_count[level] == 0)
72 direct_pages_count[level]--;
73 direct_pages_count[level - 1] += PTRS_PER_PTE;
76 void arch_report_meminfo(struct seq_file *m)
78 seq_printf(m, "DirectMap4k: %8lu kB\n",
79 direct_pages_count[PG_LEVEL_4K] << 2);
80 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
81 seq_printf(m, "DirectMap2M: %8lu kB\n",
82 direct_pages_count[PG_LEVEL_2M] << 11);
84 seq_printf(m, "DirectMap4M: %8lu kB\n",
85 direct_pages_count[PG_LEVEL_2M] << 12);
88 seq_printf(m, "DirectMap1G: %8lu kB\n",
89 direct_pages_count[PG_LEVEL_1G] << 20);
92 static inline void split_page_count(int level) { }
97 static inline unsigned long highmap_start_pfn(void)
99 return __pa_symbol(_text) >> PAGE_SHIFT;
102 static inline unsigned long highmap_end_pfn(void)
104 return __pa_symbol(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
110 within(unsigned long addr, unsigned long start, unsigned long end)
112 return addr >= start && addr < end;
120 * clflush_cache_range - flush a cache range with clflush
121 * @vaddr: virtual start address
122 * @size: number of bytes to flush
124 * clflushopt is an unordered instruction which needs fencing with mfence or
125 * sfence to avoid ordering issues.
127 void clflush_cache_range(void *vaddr, unsigned int size)
129 const unsigned long clflush_size = boot_cpu_data.x86_clflush_size;
130 void *p = (void *)((unsigned long)vaddr & ~(clflush_size - 1));
131 void *vend = vaddr + size;
138 for (; p < vend; p += clflush_size)
143 EXPORT_SYMBOL_GPL(clflush_cache_range);
145 static void __cpa_flush_all(void *arg)
147 unsigned long cache = (unsigned long)arg;
150 * Flush all to work around Errata in early athlons regarding
151 * large page flushing.
155 if (cache && boot_cpu_data.x86 >= 4)
159 static void cpa_flush_all(unsigned long cache)
161 BUG_ON(irqs_disabled());
163 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
166 static void __cpa_flush_range(void *arg)
169 * We could optimize that further and do individual per page
170 * tlb invalidates for a low number of pages. Caveat: we must
171 * flush the high aliases on 64bit as well.
176 static void cpa_flush_range(unsigned long start, int numpages, int cache)
178 unsigned int i, level;
181 BUG_ON(irqs_disabled());
182 WARN_ON(PAGE_ALIGN(start) != start);
184 on_each_cpu(__cpa_flush_range, NULL, 1);
190 * We only need to flush on one CPU,
191 * clflush is a MESI-coherent instruction that
192 * will cause all other CPUs to flush the same
195 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
196 pte_t *pte = lookup_address(addr, &level);
199 * Only flush present addresses:
201 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
202 clflush_cache_range((void *) addr, PAGE_SIZE);
206 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
207 int in_flags, struct page **pages)
209 unsigned int i, level;
210 unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
212 BUG_ON(irqs_disabled());
214 on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
216 if (!cache || do_wbinvd)
220 * We only need to flush on one CPU,
221 * clflush is a MESI-coherent instruction that
222 * will cause all other CPUs to flush the same
225 for (i = 0; i < numpages; i++) {
229 if (in_flags & CPA_PAGES_ARRAY)
230 addr = (unsigned long)page_address(pages[i]);
234 pte = lookup_address(addr, &level);
237 * Only flush present addresses:
239 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
240 clflush_cache_range((void *)addr, PAGE_SIZE);
245 * Certain areas of memory on x86 require very specific protection flags,
246 * for example the BIOS area or kernel text. Callers don't always get this
247 * right (again, ioremap() on BIOS memory is not uncommon) so this function
248 * checks and fixes these known static required protection bits.
250 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
253 pgprot_t forbidden = __pgprot(0);
256 * The BIOS area between 640k and 1Mb needs to be executable for
257 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
259 #ifdef CONFIG_PCI_BIOS
260 if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
261 pgprot_val(forbidden) |= _PAGE_NX;
265 * The kernel text needs to be executable for obvious reasons
266 * Does not cover __inittext since that is gone later on. On
267 * 64bit we do not enforce !NX on the low mapping
269 if (within(address, (unsigned long)_text, (unsigned long)_etext))
270 pgprot_val(forbidden) |= _PAGE_NX;
273 * The .rodata section needs to be read-only. Using the pfn
274 * catches all aliases.
276 if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
277 __pa_symbol(__end_rodata) >> PAGE_SHIFT))
278 pgprot_val(forbidden) |= _PAGE_RW;
280 #if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
282 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
283 * kernel text mappings for the large page aligned text, rodata sections
284 * will be always read-only. For the kernel identity mappings covering
285 * the holes caused by this alignment can be anything that user asks.
287 * This will preserve the large page mappings for kernel text/data
290 if (kernel_set_to_readonly &&
291 within(address, (unsigned long)_text,
292 (unsigned long)__end_rodata_hpage_align)) {
296 * Don't enforce the !RW mapping for the kernel text mapping,
297 * if the current mapping is already using small page mapping.
298 * No need to work hard to preserve large page mappings in this
301 * This also fixes the Linux Xen paravirt guest boot failure
302 * (because of unexpected read-only mappings for kernel identity
303 * mappings). In this paravirt guest case, the kernel text
304 * mapping and the kernel identity mapping share the same
305 * page-table pages. Thus we can't really use different
306 * protections for the kernel text and identity mappings. Also,
307 * these shared mappings are made of small page mappings.
308 * Thus this don't enforce !RW mapping for small page kernel
309 * text mapping logic will help Linux Xen parvirt guest boot
312 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
313 pgprot_val(forbidden) |= _PAGE_RW;
317 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
323 * Lookup the page table entry for a virtual address in a specific pgd.
324 * Return a pointer to the entry and the level of the mapping.
326 pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
332 *level = PG_LEVEL_NONE;
337 pud = pud_offset(pgd, address);
341 *level = PG_LEVEL_1G;
342 if (pud_large(*pud) || !pud_present(*pud))
345 pmd = pmd_offset(pud, address);
349 *level = PG_LEVEL_2M;
350 if (pmd_large(*pmd) || !pmd_present(*pmd))
353 *level = PG_LEVEL_4K;
355 return pte_offset_kernel(pmd, address);
359 * Lookup the page table entry for a virtual address. Return a pointer
360 * to the entry and the level of the mapping.
362 * Note: We return pud and pmd either when the entry is marked large
363 * or when the present bit is not set. Otherwise we would return a
364 * pointer to a nonexisting mapping.
366 pte_t *lookup_address(unsigned long address, unsigned int *level)
368 return lookup_address_in_pgd(pgd_offset_k(address), address, level);
370 EXPORT_SYMBOL_GPL(lookup_address);
372 static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
376 return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
379 return lookup_address(address, level);
383 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
384 * or NULL if not present.
386 pmd_t *lookup_pmd_address(unsigned long address)
391 pgd = pgd_offset_k(address);
395 pud = pud_offset(pgd, address);
396 if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
399 return pmd_offset(pud, address);
403 * This is necessary because __pa() does not work on some
404 * kinds of memory, like vmalloc() or the alloc_remap()
405 * areas on 32-bit NUMA systems. The percpu areas can
406 * end up in this kind of memory, for instance.
408 * This could be optimized, but it is only intended to be
409 * used at inititalization time, and keeping it
410 * unoptimized should increase the testing coverage for
411 * the more obscure platforms.
413 phys_addr_t slow_virt_to_phys(void *__virt_addr)
415 unsigned long virt_addr = (unsigned long)__virt_addr;
416 unsigned long phys_addr, offset;
420 pte = lookup_address(virt_addr, &level);
425 phys_addr = pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
426 offset = virt_addr & ~PUD_PAGE_MASK;
429 phys_addr = pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
430 offset = virt_addr & ~PMD_PAGE_MASK;
433 phys_addr = pte_pfn(*pte) << PAGE_SHIFT;
434 offset = virt_addr & ~PAGE_MASK;
437 return (phys_addr_t)(phys_addr | offset);
439 EXPORT_SYMBOL_GPL(slow_virt_to_phys);
442 * Set the new pmd in all the pgds we know about:
444 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
447 set_pte_atomic(kpte, pte);
449 if (!SHARED_KERNEL_PMD) {
452 list_for_each_entry(page, &pgd_list, lru) {
457 pgd = (pgd_t *)page_address(page) + pgd_index(address);
458 pud = pud_offset(pgd, address);
459 pmd = pmd_offset(pud, address);
460 set_pte_atomic((pte_t *)pmd, pte);
467 try_preserve_large_page(pte_t *kpte, unsigned long address,
468 struct cpa_data *cpa)
470 unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn, old_pfn;
471 pte_t new_pte, old_pte, *tmp;
472 pgprot_t old_prot, new_prot, req_prot;
476 if (cpa->force_split)
479 spin_lock(&pgd_lock);
481 * Check for races, another CPU might have split this page
484 tmp = _lookup_address_cpa(cpa, address, &level);
490 old_prot = pmd_pgprot(*(pmd_t *)kpte);
491 old_pfn = pmd_pfn(*(pmd_t *)kpte);
494 old_prot = pud_pgprot(*(pud_t *)kpte);
495 old_pfn = pud_pfn(*(pud_t *)kpte);
502 psize = page_level_size(level);
503 pmask = page_level_mask(level);
506 * Calculate the number of pages, which fit into this large
507 * page starting at address:
509 nextpage_addr = (address + psize) & pmask;
510 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
511 if (numpages < cpa->numpages)
512 cpa->numpages = numpages;
515 * We are safe now. Check whether the new pgprot is the same:
516 * Convert protection attributes to 4k-format, as cpa->mask* are set
520 req_prot = pgprot_large_2_4k(old_prot);
522 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
523 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
526 * req_prot is in format of 4k pages. It must be converted to large
527 * page format: the caching mode includes the PAT bit located at
528 * different bit positions in the two formats.
530 req_prot = pgprot_4k_2_large(req_prot);
533 * Set the PSE and GLOBAL flags only if the PRESENT flag is
534 * set otherwise pmd_present/pmd_huge will return true even on
535 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
536 * for the ancient hardware that doesn't support it.
538 if (pgprot_val(req_prot) & _PAGE_PRESENT)
539 pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
541 pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
543 req_prot = canon_pgprot(req_prot);
546 * old_pfn points to the large page base pfn. So we need
547 * to add the offset of the virtual address:
549 pfn = old_pfn + ((address & (psize - 1)) >> PAGE_SHIFT);
552 new_prot = static_protections(req_prot, address, pfn);
555 * We need to check the full range, whether
556 * static_protection() requires a different pgprot for one of
557 * the pages in the range we try to preserve:
559 addr = address & pmask;
561 for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
562 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
564 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
569 * If there are no changes, return. maxpages has been updated
572 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
578 * We need to change the attributes. Check, whether we can
579 * change the large page in one go. We request a split, when
580 * the address is not aligned and the number of pages is
581 * smaller than the number of pages in the large page. Note
582 * that we limited the number of possible pages already to
583 * the number of pages in the large page.
585 if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
587 * The address is aligned and the number of pages
588 * covers the full page.
590 new_pte = pfn_pte(old_pfn, new_prot);
591 __set_pmd_pte(kpte, address, new_pte);
592 cpa->flags |= CPA_FLUSHTLB;
597 spin_unlock(&pgd_lock);
603 __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
606 pte_t *pbase = (pte_t *)page_address(base);
607 unsigned long ref_pfn, pfn, pfninc = 1;
608 unsigned int i, level;
612 spin_lock(&pgd_lock);
614 * Check for races, another CPU might have split this page
617 tmp = _lookup_address_cpa(cpa, address, &level);
619 spin_unlock(&pgd_lock);
623 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
627 ref_prot = pmd_pgprot(*(pmd_t *)kpte);
628 /* clear PSE and promote PAT bit to correct position */
629 ref_prot = pgprot_large_2_4k(ref_prot);
630 ref_pfn = pmd_pfn(*(pmd_t *)kpte);
634 ref_prot = pud_pgprot(*(pud_t *)kpte);
635 ref_pfn = pud_pfn(*(pud_t *)kpte);
636 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
639 * Clear the PSE flags if the PRESENT flag is not set
640 * otherwise pmd_present/pmd_huge will return true
641 * even on a non present pmd.
643 if (!(pgprot_val(ref_prot) & _PAGE_PRESENT))
644 pgprot_val(ref_prot) &= ~_PAGE_PSE;
648 spin_unlock(&pgd_lock);
653 * Set the GLOBAL flags only if the PRESENT flag is set
654 * otherwise pmd/pte_present will return true even on a non
655 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
656 * for the ancient hardware that doesn't support it.
658 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
659 pgprot_val(ref_prot) |= _PAGE_GLOBAL;
661 pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
664 * Get the target pfn from the original entry:
667 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
668 set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
670 if (virt_addr_valid(address)) {
671 unsigned long pfn = PFN_DOWN(__pa(address));
673 if (pfn_range_is_mapped(pfn, pfn + 1))
674 split_page_count(level);
678 * Install the new, split up pagetable.
680 * We use the standard kernel pagetable protections for the new
681 * pagetable protections, the actual ptes set above control the
682 * primary protection behavior:
684 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
687 * Intel Atom errata AAH41 workaround.
689 * The real fix should be in hw or in a microcode update, but
690 * we also probabilistically try to reduce the window of having
691 * a large TLB mixed with 4K TLBs while instruction fetches are
695 spin_unlock(&pgd_lock);
700 static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
701 unsigned long address)
705 if (!debug_pagealloc_enabled())
706 spin_unlock(&cpa_lock);
707 base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
708 if (!debug_pagealloc_enabled())
709 spin_lock(&cpa_lock);
713 if (__split_large_page(cpa, kpte, address, base))
719 static bool try_to_free_pte_page(pte_t *pte)
723 for (i = 0; i < PTRS_PER_PTE; i++)
724 if (!pte_none(pte[i]))
727 free_page((unsigned long)pte);
731 static bool try_to_free_pmd_page(pmd_t *pmd)
735 for (i = 0; i < PTRS_PER_PMD; i++)
736 if (!pmd_none(pmd[i]))
739 free_page((unsigned long)pmd);
743 static bool try_to_free_pud_page(pud_t *pud)
747 for (i = 0; i < PTRS_PER_PUD; i++)
748 if (!pud_none(pud[i]))
751 free_page((unsigned long)pud);
755 static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
757 pte_t *pte = pte_offset_kernel(pmd, start);
759 while (start < end) {
760 set_pte(pte, __pte(0));
766 if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
773 static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
774 unsigned long start, unsigned long end)
776 if (unmap_pte_range(pmd, start, end))
777 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
781 static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
783 pmd_t *pmd = pmd_offset(pud, start);
786 * Not on a 2MB page boundary?
788 if (start & (PMD_SIZE - 1)) {
789 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
790 unsigned long pre_end = min_t(unsigned long, end, next_page);
792 __unmap_pmd_range(pud, pmd, start, pre_end);
799 * Try to unmap in 2M chunks.
801 while (end - start >= PMD_SIZE) {
805 __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
815 return __unmap_pmd_range(pud, pmd, start, end);
818 * Try again to free the PMD page if haven't succeeded above.
821 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
825 static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end)
827 pud_t *pud = pud_offset(pgd, start);
830 * Not on a GB page boundary?
832 if (start & (PUD_SIZE - 1)) {
833 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
834 unsigned long pre_end = min_t(unsigned long, end, next_page);
836 unmap_pmd_range(pud, start, pre_end);
843 * Try to unmap in 1G chunks?
845 while (end - start >= PUD_SIZE) {
850 unmap_pmd_range(pud, start, start + PUD_SIZE);
860 unmap_pmd_range(pud, start, end);
863 * No need to try to free the PUD page because we'll free it in
864 * populate_pgd's error path
868 static void unmap_pgd_range(pgd_t *root, unsigned long addr, unsigned long end)
870 pgd_t *pgd_entry = root + pgd_index(addr);
872 unmap_pud_range(pgd_entry, addr, end);
874 if (try_to_free_pud_page((pud_t *)pgd_page_vaddr(*pgd_entry)))
875 pgd_clear(pgd_entry);
878 static int alloc_pte_page(pmd_t *pmd)
880 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
884 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
888 static int alloc_pmd_page(pud_t *pud)
890 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
894 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
898 static void populate_pte(struct cpa_data *cpa,
899 unsigned long start, unsigned long end,
900 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
904 pte = pte_offset_kernel(pmd, start);
906 while (num_pages-- && start < end) {
907 set_pte(pte, pfn_pte(cpa->pfn, pgprot));
915 static int populate_pmd(struct cpa_data *cpa,
916 unsigned long start, unsigned long end,
917 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
919 unsigned int cur_pages = 0;
924 * Not on a 2M boundary?
926 if (start & (PMD_SIZE - 1)) {
927 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
928 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
930 pre_end = min_t(unsigned long, pre_end, next_page);
931 cur_pages = (pre_end - start) >> PAGE_SHIFT;
932 cur_pages = min_t(unsigned int, num_pages, cur_pages);
937 pmd = pmd_offset(pud, start);
939 if (alloc_pte_page(pmd))
942 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
948 * We mapped them all?
950 if (num_pages == cur_pages)
953 pmd_pgprot = pgprot_4k_2_large(pgprot);
955 while (end - start >= PMD_SIZE) {
958 * We cannot use a 1G page so allocate a PMD page if needed.
961 if (alloc_pmd_page(pud))
964 pmd = pmd_offset(pud, start);
966 set_pmd(pmd, __pmd(cpa->pfn << PAGE_SHIFT | _PAGE_PSE |
967 massage_pgprot(pmd_pgprot)));
970 cpa->pfn += PMD_SIZE >> PAGE_SHIFT;
971 cur_pages += PMD_SIZE >> PAGE_SHIFT;
975 * Map trailing 4K pages.
978 pmd = pmd_offset(pud, start);
980 if (alloc_pte_page(pmd))
983 populate_pte(cpa, start, end, num_pages - cur_pages,
989 static int populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd,
997 end = start + (cpa->numpages << PAGE_SHIFT);
1000 * Not on a Gb page boundary? => map everything up to it with
1003 if (start & (PUD_SIZE - 1)) {
1004 unsigned long pre_end;
1005 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1007 pre_end = min_t(unsigned long, end, next_page);
1008 cur_pages = (pre_end - start) >> PAGE_SHIFT;
1009 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
1011 pud = pud_offset(pgd, start);
1017 if (alloc_pmd_page(pud))
1020 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1028 /* We mapped them all? */
1029 if (cpa->numpages == cur_pages)
1032 pud = pud_offset(pgd, start);
1033 pud_pgprot = pgprot_4k_2_large(pgprot);
1036 * Map everything starting from the Gb boundary, possibly with 1G pages
1038 while (end - start >= PUD_SIZE) {
1039 set_pud(pud, __pud(cpa->pfn << PAGE_SHIFT | _PAGE_PSE |
1040 massage_pgprot(pud_pgprot)));
1043 cpa->pfn += PUD_SIZE >> PAGE_SHIFT;
1044 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1048 /* Map trailing leftover */
1052 pud = pud_offset(pgd, start);
1054 if (alloc_pmd_page(pud))
1057 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1068 * Restrictions for kernel page table do not necessarily apply when mapping in
1071 static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1073 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1074 pud_t *pud = NULL; /* shut up gcc */
1078 pgd_entry = cpa->pgd + pgd_index(addr);
1081 * Allocate a PUD page and hand it down for mapping.
1083 if (pgd_none(*pgd_entry)) {
1084 pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
1088 set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE));
1091 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1092 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
1094 ret = populate_pud(cpa, addr, pgd_entry, pgprot);
1096 unmap_pgd_range(cpa->pgd, addr,
1097 addr + (cpa->numpages << PAGE_SHIFT));
1101 cpa->numpages = ret;
1105 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1109 return populate_pgd(cpa, vaddr);
1112 * Ignore all non primary paths.
1118 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1120 * Also set numpages to '1' indicating that we processed cpa req for
1121 * one virtual address page and its pfn. TBD: numpages can be set based
1122 * on the initial value and the level returned by lookup_address().
1124 if (within(vaddr, PAGE_OFFSET,
1125 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1127 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1130 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1131 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1138 static int __change_page_attr(struct cpa_data *cpa, int primary)
1140 unsigned long address;
1143 pte_t *kpte, old_pte;
1145 if (cpa->flags & CPA_PAGES_ARRAY) {
1146 struct page *page = cpa->pages[cpa->curpage];
1147 if (unlikely(PageHighMem(page)))
1149 address = (unsigned long)page_address(page);
1150 } else if (cpa->flags & CPA_ARRAY)
1151 address = cpa->vaddr[cpa->curpage];
1153 address = *cpa->vaddr;
1155 kpte = _lookup_address_cpa(cpa, address, &level);
1157 return __cpa_process_fault(cpa, address, primary);
1160 if (!pte_val(old_pte))
1161 return __cpa_process_fault(cpa, address, primary);
1163 if (level == PG_LEVEL_4K) {
1165 pgprot_t new_prot = pte_pgprot(old_pte);
1166 unsigned long pfn = pte_pfn(old_pte);
1168 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1169 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1171 new_prot = static_protections(new_prot, address, pfn);
1174 * Set the GLOBAL flags only if the PRESENT flag is
1175 * set otherwise pte_present will return true even on
1176 * a non present pte. The canon_pgprot will clear
1177 * _PAGE_GLOBAL for the ancient hardware that doesn't
1180 if (pgprot_val(new_prot) & _PAGE_PRESENT)
1181 pgprot_val(new_prot) |= _PAGE_GLOBAL;
1183 pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
1186 * We need to keep the pfn from the existing PTE,
1187 * after all we're only going to change it's attributes
1188 * not the memory it points to
1190 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
1193 * Do we really change anything ?
1195 if (pte_val(old_pte) != pte_val(new_pte)) {
1196 set_pte_atomic(kpte, new_pte);
1197 cpa->flags |= CPA_FLUSHTLB;
1204 * Check, whether we can keep the large page intact
1205 * and just change the pte:
1207 do_split = try_preserve_large_page(kpte, address, cpa);
1209 * When the range fits into the existing large page,
1210 * return. cp->numpages and cpa->tlbflush have been updated in
1217 * We have to split the large page:
1219 err = split_large_page(cpa, kpte, address);
1222 * Do a global flush tlb after splitting the large page
1223 * and before we do the actual change page attribute in the PTE.
1225 * With out this, we violate the TLB application note, that says
1226 * "The TLBs may contain both ordinary and large-page
1227 * translations for a 4-KByte range of linear addresses. This
1228 * may occur if software modifies the paging structures so that
1229 * the page size used for the address range changes. If the two
1230 * translations differ with respect to page frame or attributes
1231 * (e.g., permissions), processor behavior is undefined and may
1232 * be implementation-specific."
1234 * We do this global tlb flush inside the cpa_lock, so that we
1235 * don't allow any other cpu, with stale tlb entries change the
1236 * page attribute in parallel, that also falls into the
1237 * just split large page entry.
1246 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1248 static int cpa_process_alias(struct cpa_data *cpa)
1250 struct cpa_data alias_cpa;
1251 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1252 unsigned long vaddr;
1255 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1259 * No need to redo, when the primary call touched the direct
1262 if (cpa->flags & CPA_PAGES_ARRAY) {
1263 struct page *page = cpa->pages[cpa->curpage];
1264 if (unlikely(PageHighMem(page)))
1266 vaddr = (unsigned long)page_address(page);
1267 } else if (cpa->flags & CPA_ARRAY)
1268 vaddr = cpa->vaddr[cpa->curpage];
1270 vaddr = *cpa->vaddr;
1272 if (!(within(vaddr, PAGE_OFFSET,
1273 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1276 alias_cpa.vaddr = &laddr;
1277 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1279 ret = __change_page_attr_set_clr(&alias_cpa, 0);
1284 #ifdef CONFIG_X86_64
1286 * If the primary call didn't touch the high mapping already
1287 * and the physical address is inside the kernel map, we need
1288 * to touch the high mapped kernel as well:
1290 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1291 within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
1292 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1293 __START_KERNEL_map - phys_base;
1295 alias_cpa.vaddr = &temp_cpa_vaddr;
1296 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1299 * The high mapping range is imprecise, so ignore the
1302 __change_page_attr_set_clr(&alias_cpa, 0);
1309 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1311 int ret, numpages = cpa->numpages;
1315 * Store the remaining nr of pages for the large page
1316 * preservation check.
1318 cpa->numpages = numpages;
1319 /* for array changes, we can't use large page */
1320 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1323 if (!debug_pagealloc_enabled())
1324 spin_lock(&cpa_lock);
1325 ret = __change_page_attr(cpa, checkalias);
1326 if (!debug_pagealloc_enabled())
1327 spin_unlock(&cpa_lock);
1332 ret = cpa_process_alias(cpa);
1338 * Adjust the number of pages with the result of the
1339 * CPA operation. Either a large page has been
1340 * preserved or a single page update happened.
1342 BUG_ON(cpa->numpages > numpages || !cpa->numpages);
1343 numpages -= cpa->numpages;
1344 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
1347 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1353 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1354 pgprot_t mask_set, pgprot_t mask_clr,
1355 int force_split, int in_flag,
1356 struct page **pages)
1358 struct cpa_data cpa;
1359 int ret, cache, checkalias;
1360 unsigned long baddr = 0;
1362 memset(&cpa, 0, sizeof(cpa));
1365 * Check, if we are requested to change a not supported
1368 mask_set = canon_pgprot(mask_set);
1369 mask_clr = canon_pgprot(mask_clr);
1370 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1373 /* Ensure we are PAGE_SIZE aligned */
1374 if (in_flag & CPA_ARRAY) {
1376 for (i = 0; i < numpages; i++) {
1377 if (addr[i] & ~PAGE_MASK) {
1378 addr[i] &= PAGE_MASK;
1382 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1384 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1385 * No need to cehck in that case
1387 if (*addr & ~PAGE_MASK) {
1390 * People should not be passing in unaligned addresses:
1395 * Save address for cache flush. *addr is modified in the call
1396 * to __change_page_attr_set_clr() below.
1401 /* Must avoid aliasing mappings in the highmem code */
1402 kmap_flush_unused();
1408 cpa.numpages = numpages;
1409 cpa.mask_set = mask_set;
1410 cpa.mask_clr = mask_clr;
1413 cpa.force_split = force_split;
1415 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1416 cpa.flags |= in_flag;
1418 /* No alias checking for _NX bit modifications */
1419 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1421 ret = __change_page_attr_set_clr(&cpa, checkalias);
1424 * Check whether we really changed something:
1426 if (!(cpa.flags & CPA_FLUSHTLB))
1430 * No need to flush, when we did not set any of the caching
1433 cache = !!pgprot2cachemode(mask_set);
1436 * On success we use CLFLUSH, when the CPU supports it to
1437 * avoid the WBINVD. If the CPU does not support it and in the
1438 * error case we fall back to cpa_flush_all (which uses
1441 if (!ret && cpu_has_clflush) {
1442 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1443 cpa_flush_array(addr, numpages, cache,
1446 cpa_flush_range(baddr, numpages, cache);
1448 cpa_flush_all(cache);
1454 static inline int change_page_attr_set(unsigned long *addr, int numpages,
1455 pgprot_t mask, int array)
1457 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1458 (array ? CPA_ARRAY : 0), NULL);
1461 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1462 pgprot_t mask, int array)
1464 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1465 (array ? CPA_ARRAY : 0), NULL);
1468 static inline int cpa_set_pages_array(struct page **pages, int numpages,
1471 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1472 CPA_PAGES_ARRAY, pages);
1475 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1478 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1479 CPA_PAGES_ARRAY, pages);
1482 int _set_memory_uc(unsigned long addr, int numpages)
1485 * for now UC MINUS. see comments in ioremap_nocache()
1486 * If you really need strong UC use ioremap_uc(), but note
1487 * that you cannot override IO areas with set_memory_*() as
1488 * these helpers cannot work with IO memory.
1490 return change_page_attr_set(&addr, numpages,
1491 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1495 int set_memory_uc(unsigned long addr, int numpages)
1500 * for now UC MINUS. see comments in ioremap_nocache()
1502 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1503 _PAGE_CACHE_MODE_UC_MINUS, NULL);
1507 ret = _set_memory_uc(addr, numpages);
1514 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1518 EXPORT_SYMBOL(set_memory_uc);
1520 static int _set_memory_array(unsigned long *addr, int addrinarray,
1521 enum page_cache_mode new_type)
1523 enum page_cache_mode set_type;
1527 for (i = 0; i < addrinarray; i++) {
1528 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1534 /* If WC, set to UC- first and then WC */
1535 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1536 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1538 ret = change_page_attr_set(addr, addrinarray,
1539 cachemode2pgprot(set_type), 1);
1541 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1542 ret = change_page_attr_set_clr(addr, addrinarray,
1544 _PAGE_CACHE_MODE_WC),
1545 __pgprot(_PAGE_CACHE_MASK),
1546 0, CPA_ARRAY, NULL);
1553 for (j = 0; j < i; j++)
1554 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1559 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1561 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1563 EXPORT_SYMBOL(set_memory_array_uc);
1565 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1567 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
1569 EXPORT_SYMBOL(set_memory_array_wc);
1571 int set_memory_array_wt(unsigned long *addr, int addrinarray)
1573 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
1575 EXPORT_SYMBOL_GPL(set_memory_array_wt);
1577 int _set_memory_wc(unsigned long addr, int numpages)
1580 unsigned long addr_copy = addr;
1582 ret = change_page_attr_set(&addr, numpages,
1583 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1586 ret = change_page_attr_set_clr(&addr_copy, numpages,
1588 _PAGE_CACHE_MODE_WC),
1589 __pgprot(_PAGE_CACHE_MASK),
1595 int set_memory_wc(unsigned long addr, int numpages)
1599 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1600 _PAGE_CACHE_MODE_WC, NULL);
1604 ret = _set_memory_wc(addr, numpages);
1606 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1610 EXPORT_SYMBOL(set_memory_wc);
1612 int _set_memory_wt(unsigned long addr, int numpages)
1614 return change_page_attr_set(&addr, numpages,
1615 cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1618 int set_memory_wt(unsigned long addr, int numpages)
1622 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1623 _PAGE_CACHE_MODE_WT, NULL);
1627 ret = _set_memory_wt(addr, numpages);
1629 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1633 EXPORT_SYMBOL_GPL(set_memory_wt);
1635 int _set_memory_wb(unsigned long addr, int numpages)
1637 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1638 return change_page_attr_clear(&addr, numpages,
1639 __pgprot(_PAGE_CACHE_MASK), 0);
1642 int set_memory_wb(unsigned long addr, int numpages)
1646 ret = _set_memory_wb(addr, numpages);
1650 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1653 EXPORT_SYMBOL(set_memory_wb);
1655 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1660 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1661 ret = change_page_attr_clear(addr, addrinarray,
1662 __pgprot(_PAGE_CACHE_MASK), 1);
1666 for (i = 0; i < addrinarray; i++)
1667 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1671 EXPORT_SYMBOL(set_memory_array_wb);
1673 int set_memory_x(unsigned long addr, int numpages)
1675 if (!(__supported_pte_mask & _PAGE_NX))
1678 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1680 EXPORT_SYMBOL(set_memory_x);
1682 int set_memory_nx(unsigned long addr, int numpages)
1684 if (!(__supported_pte_mask & _PAGE_NX))
1687 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1689 EXPORT_SYMBOL(set_memory_nx);
1691 int set_memory_ro(unsigned long addr, int numpages)
1693 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1696 int set_memory_rw(unsigned long addr, int numpages)
1698 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1701 int set_memory_np(unsigned long addr, int numpages)
1703 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1706 int set_memory_4k(unsigned long addr, int numpages)
1708 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1709 __pgprot(0), 1, 0, NULL);
1712 int set_pages_uc(struct page *page, int numpages)
1714 unsigned long addr = (unsigned long)page_address(page);
1716 return set_memory_uc(addr, numpages);
1718 EXPORT_SYMBOL(set_pages_uc);
1720 static int _set_pages_array(struct page **pages, int addrinarray,
1721 enum page_cache_mode new_type)
1723 unsigned long start;
1725 enum page_cache_mode set_type;
1730 for (i = 0; i < addrinarray; i++) {
1731 if (PageHighMem(pages[i]))
1733 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1734 end = start + PAGE_SIZE;
1735 if (reserve_memtype(start, end, new_type, NULL))
1739 /* If WC, set to UC- first and then WC */
1740 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1741 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1743 ret = cpa_set_pages_array(pages, addrinarray,
1744 cachemode2pgprot(set_type));
1745 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1746 ret = change_page_attr_set_clr(NULL, addrinarray,
1748 _PAGE_CACHE_MODE_WC),
1749 __pgprot(_PAGE_CACHE_MASK),
1750 0, CPA_PAGES_ARRAY, pages);
1753 return 0; /* Success */
1756 for (i = 0; i < free_idx; i++) {
1757 if (PageHighMem(pages[i]))
1759 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1760 end = start + PAGE_SIZE;
1761 free_memtype(start, end);
1766 int set_pages_array_uc(struct page **pages, int addrinarray)
1768 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1770 EXPORT_SYMBOL(set_pages_array_uc);
1772 int set_pages_array_wc(struct page **pages, int addrinarray)
1774 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
1776 EXPORT_SYMBOL(set_pages_array_wc);
1778 int set_pages_array_wt(struct page **pages, int addrinarray)
1780 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
1782 EXPORT_SYMBOL_GPL(set_pages_array_wt);
1784 int set_pages_wb(struct page *page, int numpages)
1786 unsigned long addr = (unsigned long)page_address(page);
1788 return set_memory_wb(addr, numpages);
1790 EXPORT_SYMBOL(set_pages_wb);
1792 int set_pages_array_wb(struct page **pages, int addrinarray)
1795 unsigned long start;
1799 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1800 retval = cpa_clear_pages_array(pages, addrinarray,
1801 __pgprot(_PAGE_CACHE_MASK));
1805 for (i = 0; i < addrinarray; i++) {
1806 if (PageHighMem(pages[i]))
1808 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1809 end = start + PAGE_SIZE;
1810 free_memtype(start, end);
1815 EXPORT_SYMBOL(set_pages_array_wb);
1817 int set_pages_x(struct page *page, int numpages)
1819 unsigned long addr = (unsigned long)page_address(page);
1821 return set_memory_x(addr, numpages);
1823 EXPORT_SYMBOL(set_pages_x);
1825 int set_pages_nx(struct page *page, int numpages)
1827 unsigned long addr = (unsigned long)page_address(page);
1829 return set_memory_nx(addr, numpages);
1831 EXPORT_SYMBOL(set_pages_nx);
1833 int set_pages_ro(struct page *page, int numpages)
1835 unsigned long addr = (unsigned long)page_address(page);
1837 return set_memory_ro(addr, numpages);
1840 int set_pages_rw(struct page *page, int numpages)
1842 unsigned long addr = (unsigned long)page_address(page);
1844 return set_memory_rw(addr, numpages);
1847 #ifdef CONFIG_DEBUG_PAGEALLOC
1849 static int __set_pages_p(struct page *page, int numpages)
1851 unsigned long tempaddr = (unsigned long) page_address(page);
1852 struct cpa_data cpa = { .vaddr = &tempaddr,
1854 .numpages = numpages,
1855 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1856 .mask_clr = __pgprot(0),
1860 * No alias checking needed for setting present flag. otherwise,
1861 * we may need to break large pages for 64-bit kernel text
1862 * mappings (this adds to complexity if we want to do this from
1863 * atomic context especially). Let's keep it simple!
1865 return __change_page_attr_set_clr(&cpa, 0);
1868 static int __set_pages_np(struct page *page, int numpages)
1870 unsigned long tempaddr = (unsigned long) page_address(page);
1871 struct cpa_data cpa = { .vaddr = &tempaddr,
1873 .numpages = numpages,
1874 .mask_set = __pgprot(0),
1875 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1879 * No alias checking needed for setting not present flag. otherwise,
1880 * we may need to break large pages for 64-bit kernel text
1881 * mappings (this adds to complexity if we want to do this from
1882 * atomic context especially). Let's keep it simple!
1884 return __change_page_attr_set_clr(&cpa, 0);
1887 void __kernel_map_pages(struct page *page, int numpages, int enable)
1889 if (PageHighMem(page))
1892 debug_check_no_locks_freed(page_address(page),
1893 numpages * PAGE_SIZE);
1897 * The return value is ignored as the calls cannot fail.
1898 * Large pages for identity mappings are not used at boot time
1899 * and hence no memory allocations during large page split.
1902 __set_pages_p(page, numpages);
1904 __set_pages_np(page, numpages);
1907 * We should perform an IPI and flush all tlbs,
1908 * but that can deadlock->flush only current cpu:
1912 arch_flush_lazy_mmu_mode();
1915 #ifdef CONFIG_HIBERNATION
1917 bool kernel_page_present(struct page *page)
1922 if (PageHighMem(page))
1925 pte = lookup_address((unsigned long)page_address(page), &level);
1926 return (pte_val(*pte) & _PAGE_PRESENT);
1929 #endif /* CONFIG_HIBERNATION */
1931 #endif /* CONFIG_DEBUG_PAGEALLOC */
1933 int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
1934 unsigned numpages, unsigned long page_flags)
1936 int retval = -EINVAL;
1938 struct cpa_data cpa = {
1942 .numpages = numpages,
1943 .mask_set = __pgprot(0),
1944 .mask_clr = __pgprot(0),
1948 if (!(__supported_pte_mask & _PAGE_NX))
1951 if (!(page_flags & _PAGE_NX))
1952 cpa.mask_clr = __pgprot(_PAGE_NX);
1954 cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
1956 retval = __change_page_attr_set_clr(&cpa, 0);
1963 void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address,
1966 unmap_pgd_range(root, address, address + (numpages << PAGE_SHIFT));
1970 * The testcases use internal knowledge of the implementation that shouldn't
1971 * be exposed to the rest of the kernel. Include these directly here.
1973 #ifdef CONFIG_CPA_DEBUG
1974 #include "pageattr-test.c"