2 * Intel SMP support routines.
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998-99, 2000 Ingo Molnar <mingo@redhat.com>
6 * (c) 2002,2003 Andi Kleen, SuSE Labs.
8 * This code is released under the GNU General Public License version 2 or
12 #include <linux/init.h>
15 #include <linux/irq.h>
16 #include <linux/delay.h>
17 #include <linux/spinlock.h>
18 #include <linux/smp_lock.h>
19 #include <linux/smp.h>
20 #include <linux/kernel_stat.h>
21 #include <linux/mc146818rtc.h>
22 #include <linux/interrupt.h>
25 #include <asm/pgalloc.h>
26 #include <asm/tlbflush.h>
27 #include <asm/mach_apic.h>
28 #include <asm/mmu_context.h>
29 #include <asm/proto.h>
32 * Smarter SMP flushing macros.
35 * These mean you can really definitely utterly forget about
36 * writing to user space from interrupts. (Its not allowed anyway).
38 * Optimizations Manfred Spraul <manfred@colorfullife.com>
41 static cpumask_t flush_cpumask;
42 static struct mm_struct * flush_mm;
43 static unsigned long flush_va;
44 static DEFINE_SPINLOCK(tlbstate_lock);
45 #define FLUSH_ALL -1ULL
48 * We cannot call mmdrop() because we are in interrupt context,
49 * instead update mm->cpu_vm_mask.
51 static inline void leave_mm (unsigned long cpu)
53 if (read_pda(mmu_state) == TLBSTATE_OK)
55 clear_bit(cpu, &read_pda(active_mm)->cpu_vm_mask);
56 load_cr3(swapper_pg_dir);
61 * The flush IPI assumes that a thread switch happens in this order:
62 * [cpu0: the cpu that switches]
63 * 1) switch_mm() either 1a) or 1b)
64 * 1a) thread switch to a different mm
65 * 1a1) clear_bit(cpu, &old_mm->cpu_vm_mask);
66 * Stop ipi delivery for the old mm. This is not synchronized with
67 * the other cpus, but smp_invalidate_interrupt ignore flush ipis
68 * for the wrong mm, and in the worst case we perform a superfluous
70 * 1a2) set cpu mmu_state to TLBSTATE_OK
71 * Now the smp_invalidate_interrupt won't call leave_mm if cpu0
72 * was in lazy tlb mode.
73 * 1a3) update cpu active_mm
74 * Now cpu0 accepts tlb flushes for the new mm.
75 * 1a4) set_bit(cpu, &new_mm->cpu_vm_mask);
76 * Now the other cpus will send tlb flush ipis.
78 * 1b) thread switch without mm change
79 * cpu active_mm is correct, cpu0 already handles
81 * 1b1) set cpu mmu_state to TLBSTATE_OK
82 * 1b2) test_and_set the cpu bit in cpu_vm_mask.
83 * Atomically set the bit [other cpus will start sending flush ipis],
85 * 1b3) if the bit was 0: leave_mm was called, flush the tlb.
86 * 2) switch %%esp, ie current
88 * The interrupt must handle 2 special cases:
89 * - cr3 is changed before %%esp, ie. it cannot use current->{active_,}mm.
90 * - the cpu performs speculative tlb reads, i.e. even if the cpu only
91 * runs in kernel space, the cpu could load tlb entries for user space
94 * The good news is that cpu mmu_state is local to each cpu, no
95 * write/read ordering problems.
101 * 1) Flush the tlb entries if the cpu uses the mm that's being flushed.
102 * 2) Leave the mm if we are in the lazy tlb mode.
105 asmlinkage void smp_invalidate_interrupt (void)
111 if (!cpu_isset(cpu, flush_cpumask))
114 * This was a BUG() but until someone can quote me the
115 * line from the intel manual that guarantees an IPI to
116 * multiple CPUs is retried _only_ on the erroring CPUs
117 * its staying as a return
122 if (flush_mm == read_pda(active_mm)) {
123 if (read_pda(mmu_state) == TLBSTATE_OK) {
124 if (flush_va == FLUSH_ALL)
127 __flush_tlb_one(flush_va);
132 cpu_clear(cpu, flush_cpumask);
135 put_cpu_no_resched();
138 static void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
143 * A couple of (to be removed) sanity checks:
145 * - we do not send IPIs to not-yet booted CPUs.
146 * - current CPU must not be in mask
147 * - mask must exist :)
149 BUG_ON(cpus_empty(cpumask));
150 cpus_and(tmp, cpumask, cpu_online_map);
151 BUG_ON(!cpus_equal(tmp, cpumask));
152 BUG_ON(cpu_isset(smp_processor_id(), cpumask));
157 * I'm not happy about this global shared spinlock in the
158 * MM hot path, but we'll see how contended it is.
159 * Temporarily this turns IRQs off, so that lockups are
160 * detected by the NMI watchdog.
162 spin_lock(&tlbstate_lock);
166 cpus_or(flush_cpumask, cpumask, flush_cpumask);
169 * We have to send the IPI only to
172 send_IPI_mask(cpumask, INVALIDATE_TLB_VECTOR);
174 while (!cpus_empty(flush_cpumask))
175 mb(); /* nothing. lockup detection does not belong here */;
179 spin_unlock(&tlbstate_lock);
182 void flush_tlb_current_task(void)
184 struct mm_struct *mm = current->mm;
188 cpu_mask = mm->cpu_vm_mask;
189 cpu_clear(smp_processor_id(), cpu_mask);
192 if (!cpus_empty(cpu_mask))
193 flush_tlb_others(cpu_mask, mm, FLUSH_ALL);
197 void flush_tlb_mm (struct mm_struct * mm)
202 cpu_mask = mm->cpu_vm_mask;
203 cpu_clear(smp_processor_id(), cpu_mask);
205 if (current->active_mm == mm) {
209 leave_mm(smp_processor_id());
211 if (!cpus_empty(cpu_mask))
212 flush_tlb_others(cpu_mask, mm, FLUSH_ALL);
217 void flush_tlb_page(struct vm_area_struct * vma, unsigned long va)
219 struct mm_struct *mm = vma->vm_mm;
223 cpu_mask = mm->cpu_vm_mask;
224 cpu_clear(smp_processor_id(), cpu_mask);
226 if (current->active_mm == mm) {
230 leave_mm(smp_processor_id());
233 if (!cpus_empty(cpu_mask))
234 flush_tlb_others(cpu_mask, mm, va);
239 static void do_flush_tlb_all(void* info)
241 unsigned long cpu = smp_processor_id();
244 if (read_pda(mmu_state) == TLBSTATE_LAZY)
248 void flush_tlb_all(void)
250 on_each_cpu(do_flush_tlb_all, NULL, 1, 1);
253 void smp_kdb_stop(void)
255 send_IPI_allbutself(KDB_VECTOR);
259 * this function sends a 'reschedule' IPI to another CPU.
260 * it goes straight through and wastes no time serializing
261 * anything. Worst case is that we lose a reschedule ...
264 void smp_send_reschedule(int cpu)
266 send_IPI_mask(cpumask_of_cpu(cpu), RESCHEDULE_VECTOR);
270 * Structure and data for smp_call_function(). This is designed to minimise
271 * static memory requirements. It also looks cleaner.
273 static DEFINE_SPINLOCK(call_lock);
275 struct call_data_struct {
276 void (*func) (void *info);
283 static struct call_data_struct * call_data;
286 * this function sends a 'generic call function' IPI to all other CPUs
289 static void __smp_call_function (void (*func) (void *info), void *info,
290 int nonatomic, int wait)
292 struct call_data_struct data;
293 int cpus = num_online_cpus()-1;
300 atomic_set(&data.started, 0);
303 atomic_set(&data.finished, 0);
307 /* Send a message to all other CPUs and wait for them to respond */
308 send_IPI_allbutself(CALL_FUNCTION_VECTOR);
310 /* Wait for response */
311 while (atomic_read(&data.started) != cpus)
317 while (atomic_read(&data.finished) != cpus)
322 * smp_call_function - run a function on all other CPUs.
323 * @func: The function to run. This must be fast and non-blocking.
324 * @info: An arbitrary pointer to pass to the function.
325 * @nonatomic: currently unused.
326 * @wait: If true, wait (atomically) until function has completed on other
329 * Returns 0 on success, else a negative status code. Does not return until
330 * remote CPUs are nearly ready to execute func or are or have executed.
332 * You must not call this function with disabled interrupts or from a
333 * hardware interrupt handler or from a bottom half handler.
334 * Actually there are a few legal cases, like panic.
336 int smp_call_function (void (*func) (void *info), void *info, int nonatomic,
339 spin_lock(&call_lock);
340 __smp_call_function(func,info,nonatomic,wait);
341 spin_unlock(&call_lock);
345 void smp_stop_cpu(void)
350 cpu_clear(smp_processor_id(), cpu_online_map);
352 disable_local_APIC();
356 static void smp_really_stop_cpu(void *dummy)
363 void smp_send_stop(void)
368 /* Don't deadlock on the call lock in panic */
369 if (!spin_trylock(&call_lock)) {
370 /* ignore locking because we have paniced anyways */
373 __smp_call_function(smp_really_stop_cpu, NULL, 0, 0);
375 spin_unlock(&call_lock);
378 disable_local_APIC();
383 * Reschedule call back. Nothing to do,
384 * all the work is done automatically when
385 * we return from the interrupt.
387 asmlinkage void smp_reschedule_interrupt(void)
392 asmlinkage void smp_call_function_interrupt(void)
394 void (*func) (void *info) = call_data->func;
395 void *info = call_data->info;
396 int wait = call_data->wait;
400 * Notify initiating CPU that I've grabbed the data and am
401 * about to execute the function
404 atomic_inc(&call_data->started);
406 * At this point the info structure may be out of scope unless wait==1
413 atomic_inc(&call_data->finished);