arch/xtensa/kernel/setup.c

   1 /*
   2  * arch/xtensa/kernel/setup.c
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file "COPYING" in the main directory of this archive
   6  * for more details.
   7  *
   8  * Copyright (C) 1995  Linus Torvalds
   9  * Copyright (C) 2001 - 2005  Tensilica Inc.
  10  *
  11  * Chris Zankel <chris@zankel.net>
  12  * Joe Taylor   <joe@tensilica.com, joetylr@yahoo.com>
  13  * Kevin Chea
  14  * Marc Gauthier<marc@tensilica.com> <marc@alumni.uwaterloo.ca>
  15  */
  16
  17 #include <linux/errno.h>
  18 #include <linux/init.h>
  19 #include <linux/mm.h>
  20 #include <linux/proc_fs.h>
  21 #include <linux/screen_info.h>
  22 #include <linux/bootmem.h>
  23 #include <linux/kernel.h>
  24
  25 #ifdef CONFIG_OF
  26 #include <linux/of_fdt.h>
  27 #include <linux/of_platform.h>
  28 #endif
  29
  30 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
  31 # include <linux/console.h>
  32 #endif
  33
  34 #ifdef CONFIG_RTC
  35 # include <linux/timex.h>
  36 #endif
  37
  38 #ifdef CONFIG_PROC_FS
  39 # include <linux/seq_file.h>
  40 #endif
  41
  42 #include <asm/bootparam.h>
  43 #include <asm/pgtable.h>
  44 #include <asm/processor.h>
  45 #include <asm/timex.h>
  46 #include <asm/platform.h>
  47 #include <asm/page.h>
  48 #include <asm/setup.h>
  49 #include <asm/param.h>
  50 #include <asm/traps.h>
  51
  52 #include <platform/hardware.h>
  53
  54 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
  55 struct screen_info screen_info = { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16};
  56 #endif
  57
  58 #ifdef CONFIG_BLK_DEV_FD
  59 extern struct fd_ops no_fd_ops;
  60 struct fd_ops *fd_ops;
  61 #endif
  62
  63 extern struct rtc_ops no_rtc_ops;
  64 struct rtc_ops *rtc_ops;
  65
  66 #ifdef CONFIG_BLK_DEV_INITRD
  67 extern void *initrd_start;
  68 extern void *initrd_end;
  69 int initrd_is_mapped = 0;
  70 extern int initrd_below_start_ok;
  71 #endif
  72
  73 #ifdef CONFIG_OF
  74 extern u32 __dtb_start[];
  75 void *dtb_start = __dtb_start;
  76 #endif
  77
  78 unsigned char aux_device_present;
  79 extern unsigned long loops_per_jiffy;
  80
  81 /* Command line specified as configuration option. */
  82
  83 static char __initdata command_line[COMMAND_LINE_SIZE];
  84
  85 #ifdef CONFIG_CMDLINE_BOOL
  86 static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
  87 #endif
  88
  89 sysmem_info_t __initdata sysmem;
  90
  91 #ifdef CONFIG_MMU
  92 extern void init_mmu(void);
  93 #else
  94 static inline void init_mmu(void) { }
  95 #endif
  96
  97 extern int mem_reserve(unsigned long, unsigned long, int);
  98 extern void bootmem_init(void);
  99 extern void zones_init(void);
 100
 101 /*
 102  * Boot parameter parsing.
 103  *
 104  * The Xtensa port uses a list of variable-sized tags to pass data to
 105  * the kernel. The first tag must be a BP_TAG_FIRST tag for the list
 106  * to be recognised. The list is terminated with a zero-sized
 107  * BP_TAG_LAST tag.
 108  */
 109
 110 typedef struct tagtable {
 111         u32 tag;
 112         int (*parse)(const bp_tag_t*);
 113 } tagtable_t;
 114
 115 #define __tagtable(tag, fn) static tagtable_t __tagtable_##fn           \
 116         __attribute__((used, section(".taglist"))) = { tag, fn }
 117
 118 /* parse current tag */
 119
 120 static int __init add_sysmem_bank(unsigned long type, unsigned long start,
 121                 unsigned long end)
 122 {
 123         if (sysmem.nr_banks >= SYSMEM_BANKS_MAX) {
 124                 printk(KERN_WARNING
 125                                 "Ignoring memory bank 0x%08lx size %ldKB\n",
 126                                 start, end - start);
 127                 return -EINVAL;
 128         }
 129         sysmem.bank[sysmem.nr_banks].type  = type;
 130         sysmem.bank[sysmem.nr_banks].start = PAGE_ALIGN(start);
 131         sysmem.bank[sysmem.nr_banks].end   = end & PAGE_MASK;
 132         sysmem.nr_banks++;
 133
 134         return 0;
 135 }
 136
 137 static int __init parse_tag_mem(const bp_tag_t *tag)
 138 {
 139         meminfo_t *mi = (meminfo_t *)(tag->data);
 140
 141         if (mi->type != MEMORY_TYPE_CONVENTIONAL)
 142                 return -1;
 143
 144         return add_sysmem_bank(mi->type, mi->start, mi->end);
 145 }
 146
 147 __tagtable(BP_TAG_MEMORY, parse_tag_mem);
 148
 149 #ifdef CONFIG_BLK_DEV_INITRD
 150
 151 static int __init parse_tag_initrd(const bp_tag_t* tag)
 152 {
 153         meminfo_t* mi;
 154         mi = (meminfo_t*)(tag->data);
 155         initrd_start = __va(mi->start);
 156         initrd_end = __va(mi->end);
 157
 158         return 0;
 159 }
 160
 161 __tagtable(BP_TAG_INITRD, parse_tag_initrd);
 162
 163 #ifdef CONFIG_OF
 164
 165 static int __init parse_tag_fdt(const bp_tag_t *tag)
 166 {
 167         dtb_start = __va(tag->data[0]);
 168         return 0;
 169 }
 170
 171 __tagtable(BP_TAG_FDT, parse_tag_fdt);
 172
 173 void __init early_init_dt_setup_initrd_arch(u64 start, u64 end)
 174 {
 175         initrd_start = (void *)__va(start);
 176         initrd_end = (void *)__va(end);
 177         initrd_below_start_ok = 1;
 178 }
 179
 180 #endif /* CONFIG_OF */
 181
 182 #endif /* CONFIG_BLK_DEV_INITRD */
 183
 184 static int __init parse_tag_cmdline(const bp_tag_t* tag)
 185 {
 186         strlcpy(command_line, (char *)(tag->data), COMMAND_LINE_SIZE);
 187         return 0;
 188 }
 189
 190 __tagtable(BP_TAG_COMMAND_LINE, parse_tag_cmdline);
 191
 192 static int __init parse_bootparam(const bp_tag_t* tag)
 193 {
 194         extern tagtable_t __tagtable_begin, __tagtable_end;
 195         tagtable_t *t;
 196
 197         /* Boot parameters must start with a BP_TAG_FIRST tag. */
 198
 199         if (tag->id != BP_TAG_FIRST) {
 200                 printk(KERN_WARNING "Invalid boot parameters!\n");
 201                 return 0;
 202         }
 203
 204         tag = (bp_tag_t*)((unsigned long)tag + sizeof(bp_tag_t) + tag->size);
 205
 206         /* Parse all tags. */
 207
 208         while (tag != NULL && tag->id != BP_TAG_LAST) {
 209                 for (t = &__tagtable_begin; t < &__tagtable_end; t++) {
 210                         if (tag->id == t->tag) {
 211                                 t->parse(tag);
 212                                 break;
 213                         }
 214                 }
 215                 if (t == &__tagtable_end)
 216                         printk(KERN_WARNING "Ignoring tag "
 217                                "0x%08x\n", tag->id);
 218                 tag = (bp_tag_t*)((unsigned long)(tag + 1) + tag->size);
 219         }
 220
 221         return 0;
 222 }
 223
 224 #ifdef CONFIG_OF
 225
 226 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
 227 {
 228         size &= PAGE_MASK;
 229         add_sysmem_bank(MEMORY_TYPE_CONVENTIONAL, base, base + size);
 230 }
 231
 232 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
 233 {
 234         return __alloc_bootmem(size, align, 0);
 235 }
 236
 237 void __init early_init_devtree(void *params)
 238 {
 239         /* Setup flat device-tree pointer */
 240         initial_boot_params = params;
 241
 242         /* Retrieve various informations from the /chosen node of the
 243          * device-tree, including the platform type, initrd location and
 244          * size, TCE reserve, and more ...
 245          */
 246         if (!command_line[0])
 247                 of_scan_flat_dt(early_init_dt_scan_chosen, command_line);
 248
 249         /* Scan memory nodes and rebuild MEMBLOCKs */
 250         of_scan_flat_dt(early_init_dt_scan_root, NULL);
 251         if (sysmem.nr_banks == 0)
 252                 of_scan_flat_dt(early_init_dt_scan_memory, NULL);
 253 }
 254
 255 static void __init copy_devtree(void)
 256 {
 257         void *alloc = early_init_dt_alloc_memory_arch(
 258                         be32_to_cpu(initial_boot_params->totalsize), 8);
 259         if (alloc) {
 260                 memcpy(alloc, initial_boot_params,
 261                                 be32_to_cpu(initial_boot_params->totalsize));
 262                 initial_boot_params = alloc;
 263         }
 264 }
 265
 266 static int __init xtensa_device_probe(void)
 267 {
 268         of_platform_populate(NULL, NULL, NULL, NULL);
 269         return 0;
 270 }
 271
 272 device_initcall(xtensa_device_probe);
 273
 274 #endif /* CONFIG_OF */
 275
 276 /*
 277  * Initialize architecture. (Early stage)
 278  */
 279
 280 void __init init_arch(bp_tag_t *bp_start)
 281 {
 282         sysmem.nr_banks = 0;
 283
 284         /* Parse boot parameters */
 285
 286         if (bp_start)
 287                 parse_bootparam(bp_start);
 288
 289 #ifdef CONFIG_OF
 290         early_init_devtree(dtb_start);
 291 #endif
 292
 293         if (sysmem.nr_banks == 0) {
 294                 sysmem.nr_banks = 1;
 295                 sysmem.bank[0].start = PLATFORM_DEFAULT_MEM_START;
 296                 sysmem.bank[0].end = PLATFORM_DEFAULT_MEM_START
 297                                      + PLATFORM_DEFAULT_MEM_SIZE;
 298         }
 299
 300 #ifdef CONFIG_CMDLINE_BOOL
 301         if (!command_line[0])
 302                 strlcpy(command_line, default_command_line, COMMAND_LINE_SIZE);
 303 #endif
 304
 305         /* Early hook for platforms */
 306
 307         platform_init(bp_start);
 308
 309         /* Initialize MMU. */
 310
 311         init_mmu();
 312 }
 313
 314 /*
 315  * Initialize system. Setup memory and reserve regions.
 316  */
 317
 318 extern char _end;
 319 extern char _stext;
 320 extern char _WindowVectors_text_start;
 321 extern char _WindowVectors_text_end;
 322 extern char _DebugInterruptVector_literal_start;
 323 extern char _DebugInterruptVector_text_end;
 324 extern char _KernelExceptionVector_literal_start;
 325 extern char _KernelExceptionVector_text_end;
 326 extern char _UserExceptionVector_literal_start;
 327 extern char _UserExceptionVector_text_end;
 328 extern char _DoubleExceptionVector_literal_start;
 329 extern char _DoubleExceptionVector_text_end;
 330 #if XCHAL_EXCM_LEVEL >= 2
 331 extern char _Level2InterruptVector_text_start;
 332 extern char _Level2InterruptVector_text_end;
 333 #endif
 334 #if XCHAL_EXCM_LEVEL >= 3
 335 extern char _Level3InterruptVector_text_start;
 336 extern char _Level3InterruptVector_text_end;
 337 #endif
 338 #if XCHAL_EXCM_LEVEL >= 4
 339 extern char _Level4InterruptVector_text_start;
 340 extern char _Level4InterruptVector_text_end;
 341 #endif
 342 #if XCHAL_EXCM_LEVEL >= 5
 343 extern char _Level5InterruptVector_text_start;
 344 extern char _Level5InterruptVector_text_end;
 345 #endif
 346 #if XCHAL_EXCM_LEVEL >= 6
 347 extern char _Level6InterruptVector_text_start;
 348 extern char _Level6InterruptVector_text_end;
 349 #endif
 350
 351
 352
 353 #ifdef CONFIG_S32C1I_SELFTEST
 354 #if XCHAL_HAVE_S32C1I
 355
 356 static int __initdata rcw_word, rcw_probe_pc, rcw_exc;
 357
 358 /*
 359  * Basic atomic compare-and-swap, that records PC of S32C1I for probing.
 360  *
 361  * If *v == cmp, set *v = set.  Return previous *v.
 362  */
 363 static inline int probed_compare_swap(int *v, int cmp, int set)
 364 {
 365         int tmp;
 366
 367         __asm__ __volatile__(
 368                         "       movi    %1, 1f\n"
 369                         "       s32i    %1, %4, 0\n"
 370                         "       wsr     %2, scompare1\n"
 371                         "1:     s32c1i  %0, %3, 0\n"
 372                         : "=a" (set), "=&a" (tmp)
 373                         : "a" (cmp), "a" (v), "a" (&rcw_probe_pc), "0" (set)
 374                         : "memory"
 375                         );
 376         return set;
 377 }
 378
 379 /* Handle probed exception */
 380
 381 void __init do_probed_exception(struct pt_regs *regs, unsigned long exccause)
 382 {
 383         if (regs->pc == rcw_probe_pc) { /* exception on s32c1i ? */
 384                 regs->pc += 3;          /* skip the s32c1i instruction */
 385                 rcw_exc = exccause;
 386         } else {
 387                 do_unhandled(regs, exccause);
 388         }
 389 }
 390
 391 /* Simple test of S32C1I (soc bringup assist) */
 392
 393 void __init check_s32c1i(void)
 394 {
 395         int n, cause1, cause2;
 396         void *handbus, *handdata, *handaddr; /* temporarily saved handlers */
 397
 398         rcw_probe_pc = 0;
 399         handbus  = trap_set_handler(EXCCAUSE_LOAD_STORE_ERROR,
 400                         do_probed_exception);
 401         handdata = trap_set_handler(EXCCAUSE_LOAD_STORE_DATA_ERROR,
 402                         do_probed_exception);
 403         handaddr = trap_set_handler(EXCCAUSE_LOAD_STORE_ADDR_ERROR,
 404                         do_probed_exception);
 405
 406         /* First try an S32C1I that does not store: */
 407         rcw_exc = 0;
 408         rcw_word = 1;
 409         n = probed_compare_swap(&rcw_word, 0, 2);
 410         cause1 = rcw_exc;
 411
 412         /* took exception? */
 413         if (cause1 != 0) {
 414                 /* unclean exception? */
 415                 if (n != 2 || rcw_word != 1)
 416                         panic("S32C1I exception error");
 417         } else if (rcw_word != 1 || n != 1) {
 418                 panic("S32C1I compare error");
 419         }
 420
 421         /* Then an S32C1I that stores: */
 422         rcw_exc = 0;
 423         rcw_word = 0x1234567;
 424         n = probed_compare_swap(&rcw_word, 0x1234567, 0xabcde);
 425         cause2 = rcw_exc;
 426
 427         if (cause2 != 0) {
 428                 /* unclean exception? */
 429                 if (n != 0xabcde || rcw_word != 0x1234567)
 430                         panic("S32C1I exception error (b)");
 431         } else if (rcw_word != 0xabcde || n != 0x1234567) {
 432                 panic("S32C1I store error");
 433         }
 434
 435         /* Verify consistency of exceptions: */
 436         if (cause1 || cause2) {
 437                 pr_warn("S32C1I took exception %d, %d\n", cause1, cause2);
 438                 /* If emulation of S32C1I upon bus error gets implemented,
 439                    we can get rid of this panic for single core (not SMP) */
 440                 panic("S32C1I exceptions not currently supported");
 441         }
 442         if (cause1 != cause2)
 443                 panic("inconsistent S32C1I exceptions");
 444
 445         trap_set_handler(EXCCAUSE_LOAD_STORE_ERROR, handbus);
 446         trap_set_handler(EXCCAUSE_LOAD_STORE_DATA_ERROR, handdata);
 447         trap_set_handler(EXCCAUSE_LOAD_STORE_ADDR_ERROR, handaddr);
 448 }
 449
 450 #else /* XCHAL_HAVE_S32C1I */
 451
 452 /* This condition should not occur with a commercially deployed processor.
 453    Display reminder for early engr test or demo chips / FPGA bitstreams */
 454 void __init check_s32c1i(void)
 455 {
 456         pr_warn("Processor configuration lacks atomic compare-and-swap support!\n");
 457 }
 458
 459 #endif /* XCHAL_HAVE_S32C1I */
 460 #else /* CONFIG_S32C1I_SELFTEST */
 461
 462 void __init check_s32c1i(void)
 463 {
 464 }
 465
 466 #endif /* CONFIG_S32C1I_SELFTEST */
 467
 468
 469 void __init setup_arch(char **cmdline_p)
 470 {
 471         strlcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
 472         *cmdline_p = command_line;
 473
 474         check_s32c1i();
 475
 476         /* Reserve some memory regions */
 477
 478 #ifdef CONFIG_BLK_DEV_INITRD
 479         if (initrd_start < initrd_end) {
 480                 initrd_is_mapped = mem_reserve(__pa(initrd_start),
 481                                                __pa(initrd_end), 0);
 482                 initrd_below_start_ok = 1;
 483         } else {
 484                 initrd_start = 0;
 485         }
 486 #endif
 487
 488         mem_reserve(__pa(&_stext),__pa(&_end), 1);
 489
 490         mem_reserve(__pa(&_WindowVectors_text_start),
 491                     __pa(&_WindowVectors_text_end), 0);
 492
 493         mem_reserve(__pa(&_DebugInterruptVector_literal_start),
 494                     __pa(&_DebugInterruptVector_text_end), 0);
 495
 496         mem_reserve(__pa(&_KernelExceptionVector_literal_start),
 497                     __pa(&_KernelExceptionVector_text_end), 0);
 498
 499         mem_reserve(__pa(&_UserExceptionVector_literal_start),
 500                     __pa(&_UserExceptionVector_text_end), 0);
 501
 502         mem_reserve(__pa(&_DoubleExceptionVector_literal_start),
 503                     __pa(&_DoubleExceptionVector_text_end), 0);
 504
 505 #if XCHAL_EXCM_LEVEL >= 2
 506         mem_reserve(__pa(&_Level2InterruptVector_text_start),
 507                     __pa(&_Level2InterruptVector_text_end), 0);
 508 #endif
 509 #if XCHAL_EXCM_LEVEL >= 3
 510         mem_reserve(__pa(&_Level3InterruptVector_text_start),
 511                     __pa(&_Level3InterruptVector_text_end), 0);
 512 #endif
 513 #if XCHAL_EXCM_LEVEL >= 4
 514         mem_reserve(__pa(&_Level4InterruptVector_text_start),
 515                     __pa(&_Level4InterruptVector_text_end), 0);
 516 #endif
 517 #if XCHAL_EXCM_LEVEL >= 5
 518         mem_reserve(__pa(&_Level5InterruptVector_text_start),
 519                     __pa(&_Level5InterruptVector_text_end), 0);
 520 #endif
 521 #if XCHAL_EXCM_LEVEL >= 6
 522         mem_reserve(__pa(&_Level6InterruptVector_text_start),
 523                     __pa(&_Level6InterruptVector_text_end), 0);
 524 #endif
 525
 526         bootmem_init();
 527
 528 #ifdef CONFIG_OF
 529         copy_devtree();
 530         unflatten_device_tree();
 531 #endif
 532
 533         platform_setup(cmdline_p);
 534
 535         paging_init();
 536         zones_init();
 537
 538 #ifdef CONFIG_VT
 539 # if defined(CONFIG_VGA_CONSOLE)
 540         conswitchp = &vga_con;
 541 # elif defined(CONFIG_DUMMY_CONSOLE)
 542         conswitchp = &dummy_con;
 543 # endif
 544 #endif
 545
 546 #ifdef CONFIG_PCI
 547         platform_pcibios_init();
 548 #endif
 549 }
 550
 551 void machine_restart(char * cmd)
 552 {
 553         platform_restart();
 554 }
 555
 556 void machine_halt(void)
 557 {
 558         platform_halt();
 559         while (1);
 560 }
 561
 562 void machine_power_off(void)
 563 {
 564         platform_power_off();
 565         while (1);
 566 }
 567 #ifdef CONFIG_PROC_FS
 568
 569 /*
 570  * Display some core information through /proc/cpuinfo.
 571  */
 572
 573 static int
 574 c_show(struct seq_file *f, void *slot)
 575 {
 576         /* high-level stuff */
 577         seq_printf(f,"processor\t: 0\n"
 578                      "vendor_id\t: Tensilica\n"
 579                      "model\t\t: Xtensa " XCHAL_HW_VERSION_NAME "\n"
 580                      "core ID\t\t: " XCHAL_CORE_ID "\n"
 581                      "build ID\t: 0x%x\n"
 582                      "byte order\t: %s\n"
 583                      "cpu MHz\t\t: %lu.%02lu\n"
 584                      "bogomips\t: %lu.%02lu\n",
 585                      XCHAL_BUILD_UNIQUE_ID,
 586                      XCHAL_HAVE_BE ?  "big" : "little",
 587                      ccount_freq/1000000,
 588                      (ccount_freq/10000) % 100,
 589                      loops_per_jiffy/(500000/HZ),
 590                      (loops_per_jiffy/(5000/HZ)) % 100);
 591
 592         seq_printf(f,"flags\t\t: "
 593 #if XCHAL_HAVE_NMI
 594                      "nmi "
 595 #endif
 596 #if XCHAL_HAVE_DEBUG
 597                      "debug "
 598 # if XCHAL_HAVE_OCD
 599                      "ocd "
 600 # endif
 601 #endif
 602 #if XCHAL_HAVE_DENSITY
 603                      "density "
 604 #endif
 605 #if XCHAL_HAVE_BOOLEANS
 606                      "boolean "
 607 #endif
 608 #if XCHAL_HAVE_LOOPS
 609                      "loop "
 610 #endif
 611 #if XCHAL_HAVE_NSA
 612                      "nsa "
 613 #endif
 614 #if XCHAL_HAVE_MINMAX
 615                      "minmax "
 616 #endif
 617 #if XCHAL_HAVE_SEXT
 618                      "sext "
 619 #endif
 620 #if XCHAL_HAVE_CLAMPS
 621                      "clamps "
 622 #endif
 623 #if XCHAL_HAVE_MAC16
 624                      "mac16 "
 625 #endif
 626 #if XCHAL_HAVE_MUL16
 627                      "mul16 "
 628 #endif
 629 #if XCHAL_HAVE_MUL32
 630                      "mul32 "
 631 #endif
 632 #if XCHAL_HAVE_MUL32_HIGH
 633                      "mul32h "
 634 #endif
 635 #if XCHAL_HAVE_FP
 636                      "fpu "
 637 #endif
 638 #if XCHAL_HAVE_S32C1I
 639                      "s32c1i "
 640 #endif
 641                      "\n");
 642
 643         /* Registers. */
 644         seq_printf(f,"physical aregs\t: %d\n"
 645                      "misc regs\t: %d\n"
 646                      "ibreak\t\t: %d\n"
 647                      "dbreak\t\t: %d\n",
 648                      XCHAL_NUM_AREGS,
 649                      XCHAL_NUM_MISC_REGS,
 650                      XCHAL_NUM_IBREAK,
 651                      XCHAL_NUM_DBREAK);
 652
 653
 654         /* Interrupt. */
 655         seq_printf(f,"num ints\t: %d\n"
 656                      "ext ints\t: %d\n"
 657                      "int levels\t: %d\n"
 658                      "timers\t\t: %d\n"
 659                      "debug level\t: %d\n",
 660                      XCHAL_NUM_INTERRUPTS,
 661                      XCHAL_NUM_EXTINTERRUPTS,
 662                      XCHAL_NUM_INTLEVELS,
 663                      XCHAL_NUM_TIMERS,
 664                      XCHAL_DEBUGLEVEL);
 665
 666         /* Cache */
 667         seq_printf(f,"icache line size: %d\n"
 668                      "icache ways\t: %d\n"
 669                      "icache size\t: %d\n"
 670                      "icache flags\t: "
 671 #if XCHAL_ICACHE_LINE_LOCKABLE
 672                      "lock "
 673 #endif
 674                      "\n"
 675                      "dcache line size: %d\n"
 676                      "dcache ways\t: %d\n"
 677                      "dcache size\t: %d\n"
 678                      "dcache flags\t: "
 679 #if XCHAL_DCACHE_IS_WRITEBACK
 680                      "writeback "
 681 #endif
 682 #if XCHAL_DCACHE_LINE_LOCKABLE
 683                      "lock "
 684 #endif
 685                      "\n",
 686                      XCHAL_ICACHE_LINESIZE,
 687                      XCHAL_ICACHE_WAYS,
 688                      XCHAL_ICACHE_SIZE,
 689                      XCHAL_DCACHE_LINESIZE,
 690                      XCHAL_DCACHE_WAYS,
 691                      XCHAL_DCACHE_SIZE);
 692
 693         return 0;
 694 }
 695
 696 /*
 697  * We show only CPU #0 info.
 698  */
 699 static void *
 700 c_start(struct seq_file *f, loff_t *pos)
 701 {
 702         return (void *) ((*pos == 0) ? (void *)1 : NULL);
 703 }
 704
 705 static void *
 706 c_next(struct seq_file *f, void *v, loff_t *pos)
 707 {
 708         return NULL;
 709 }
 710
 711 static void
 712 c_stop(struct seq_file *f, void *v)
 713 {
 714 }
 715
 716 const struct seq_operations cpuinfo_op =
 717 {
 718         start:  c_start,
 719         next:   c_next,
 720         stop:   c_stop,
 721         show:   c_show
 722 };
 723
 724 #endif /* CONFIG_PROC_FS */