drivers/clk/qcom/clk-rpm.c

   1 /*
   2  * Copyright (c) 2015, Linaro Limited
   3  * Copyright (c) 2014, The Linux Foundation. All rights reserved.
   4  *
   5  * This software is licensed under the terms of the GNU General Public
   6  * License version 2, as published by the Free Software Foundation, and
   7  * may be copied, distributed, and modified under those terms.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/clk.h>
  16 #include <linux/clk-provider.h>
  17 #include <linux/err.h>
  18 #include <linux/export.h>
  19 #include <linux/init.h>
  20 #include <linux/kernel.h>
  21 #include <linux/module.h>
  22 #include <linux/mutex.h>
  23 #include <linux/mfd/qcom_rpm.h>
  24 #include <linux/of.h>
  25 #include <linux/of_device.h>
  26 #include <linux/platform_device.h>
  27
  28 #include "clk-rpm.h"
  29 #include <dt-bindings/mfd/qcom-rpm.h>
  30
  31 #define to_clk_rpm(_hw) container_of(_hw, struct clk_rpm, hw)
  32
  33 static DEFINE_MUTEX(rpm_clk_lock);
  34
  35 static int clk_rpm_set_rate_active(struct clk_rpm *r, unsigned long rate)
  36 {
  37         u32 value = DIV_ROUND_UP(rate, 1000); /* to kHz */
  38
  39         return qcom_rpm_write(r->rpm, QCOM_RPM_ACTIVE_STATE,
  40                               r->rpm_clk_id, &value, 1);
  41 }
  42
  43 static int clk_rpm_prepare(struct clk_hw *hw)
  44 {
  45         struct clk_rpm *r = to_clk_rpm(hw);
  46         unsigned long rate = r->rate;
  47         int ret = 0;
  48
  49         mutex_lock(&rpm_clk_lock);
  50
  51         if (!rate)
  52                 goto out;
  53
  54         if (r->branch)
  55                 rate = !!rate;
  56
  57         ret = clk_rpm_set_rate_active(r, rate);
  58
  59         if (ret)
  60                 goto out;
  61
  62 out:
  63         if (!ret)
  64                 r->enabled = true;
  65
  66         mutex_unlock(&rpm_clk_lock);
  67
  68         return ret;
  69 }
  70
  71 static void clk_rpm_unprepare(struct clk_hw *hw)
  72 {
  73         struct clk_rpm *r = to_clk_rpm(hw);
  74         int ret;
  75
  76         mutex_lock(&rpm_clk_lock);
  77
  78         if (!r->rate)
  79                 goto out;
  80
  81         ret = clk_rpm_set_rate_active(r, r->rate);
  82         if (ret)
  83                 goto out;
  84
  85         r->enabled = false;
  86
  87 out:
  88         mutex_unlock(&rpm_clk_lock);
  89 }
  90
  91 static int clk_rpm_set_rate(struct clk_hw *hw,
  92                      unsigned long rate, unsigned long parent_rate)
  93 {
  94         struct clk_rpm *r = to_clk_rpm(hw);
  95         int ret = 0;
  96
  97         mutex_lock(&rpm_clk_lock);
  98
  99         if (r->enabled)
 100                 ret = clk_rpm_set_rate_active(r, rate);
 101
 102         if (!ret)
 103                 r->rate = rate;
 104
 105         mutex_unlock(&rpm_clk_lock);
 106
 107         return ret;
 108 }
 109 static long clk_rpm_round_rate(struct clk_hw *hw, unsigned long rate,
 110                                unsigned long *parent_rate)
 111 {
 112         /*
 113          * RPM handles rate rounding and we don't have a way to
 114          * know what the rate will be, so just return whatever
 115          * rate is requested.
 116          */
 117         return rate;
 118 }
 119
 120 static unsigned long clk_rpm_recalc_rate(struct clk_hw *hw,
 121                                          unsigned long parent_rate)
 122 {
 123         struct clk_rpm *r = to_clk_rpm(hw);
 124
 125         /*
 126          * RPM handles rate rounding and we don't have a way to
 127          * know what the rate will be, so just return whatever
 128          * rate was set.
 129          */
 130         return r->rate;
 131 }
 132
 133 const struct clk_ops clk_rpm_ops = {
 134         .prepare        = clk_rpm_prepare,
 135         .unprepare      = clk_rpm_unprepare,
 136         .set_rate       = clk_rpm_set_rate,
 137         .round_rate     = clk_rpm_round_rate,
 138         .recalc_rate    = clk_rpm_recalc_rate,
 139 };
 140 EXPORT_SYMBOL_GPL(clk_rpm_ops);
 141
 142 const struct clk_ops clk_rpm_branch_ops = {
 143         .prepare        = clk_rpm_prepare,
 144         .unprepare      = clk_rpm_unprepare,
 145         .round_rate     = clk_rpm_round_rate,
 146         .recalc_rate    = clk_rpm_recalc_rate,
 147 };
 148 EXPORT_SYMBOL_GPL(clk_rpm_branch_ops);
 149
 150 struct rpm_cc {
 151         struct qcom_rpm *rpm;
 152         struct clk_onecell_data data;
 153         struct clk *clks[];
 154 };
 155
 156 struct rpm_clk_desc {
 157         struct clk_rpm **clks;
 158         size_t num_clks;
 159 };
 160
 161 /* apq8064 */
 162 DEFINE_CLK_RPM_PXO_BRANCH(apq8064, pxo, QCOM_RPM_PXO_CLK, 27000000);
 163 DEFINE_CLK_RPM_CXO_BRANCH(apq8064, cxo, QCOM_RPM_CXO_CLK, 19200000);
 164 DEFINE_CLK_RPM(apq8064, afab_clk, QCOM_RPM_APPS_FABRIC_CLK);
 165 DEFINE_CLK_RPM(apq8064, cfpb_clk, QCOM_RPM_CFPB_CLK);
 166 DEFINE_CLK_RPM(apq8064, daytona_clk, QCOM_RPM_DAYTONA_FABRIC_CLK);
 167 DEFINE_CLK_RPM(apq8064, ebi1_clk, QCOM_RPM_EBI1_CLK);
 168 DEFINE_CLK_RPM(apq8064, mmfab_clk, QCOM_RPM_MM_FABRIC_CLK);
 169 DEFINE_CLK_RPM(apq8064, mmfpb_clk, QCOM_RPM_MMFPB_CLK);
 170 DEFINE_CLK_RPM(apq8064, sfab_clk, QCOM_RPM_SYS_FABRIC_CLK);
 171 DEFINE_CLK_RPM(apq8064, sfpb_clk, QCOM_RPM_SFPB_CLK);
 172 DEFINE_CLK_RPM(apq8064, qdss_clk, QCOM_RPM_QDSS_CLK);
 173
 174 static struct clk_rpm *apq8064_clks[] = {
 175         [QCOM_RPM_PXO_CLK] = &apq8064_pxo,
 176         [QCOM_RPM_CXO_CLK] = &apq8064_cxo,
 177         [QCOM_RPM_APPS_FABRIC_CLK] = &apq8064_afab_clk,
 178         [QCOM_RPM_CFPB_CLK] = &apq8064_cfpb_clk,
 179         [QCOM_RPM_DAYTONA_FABRIC_CLK] = &apq8064_daytona_clk,
 180         [QCOM_RPM_EBI1_CLK] = &apq8064_ebi1_clk,
 181         [QCOM_RPM_MM_FABRIC_CLK] = &apq8064_mmfab_clk,
 182         [QCOM_RPM_MMFPB_CLK] = &apq8064_mmfpb_clk,
 183         [QCOM_RPM_SYS_FABRIC_CLK] = &apq8064_sfab_clk,
 184         [QCOM_RPM_SFPB_CLK] = &apq8064_sfpb_clk,
 185         [QCOM_RPM_QDSS_CLK] = &apq8064_qdss_clk,
 186 };
 187
 188 static const struct rpm_clk_desc rpm_clk_apq8064 = {
 189         .clks = apq8064_clks,
 190         .num_clks = ARRAY_SIZE(apq8064_clks),
 191 };
 192
 193 static const struct of_device_id rpm_clk_match_table[] = {
 194         { .compatible = "qcom,rpmcc-apq8064", .data = &rpm_clk_apq8064},
 195         { }
 196 };
 197 MODULE_DEVICE_TABLE(of, rpm_clk_match_table);
 198
 199 static int rpm_clk_probe(struct platform_device *pdev)
 200 {
 201         struct clk **clks;
 202         struct clk *clk;
 203         struct rpm_cc *rcc;
 204         struct clk_onecell_data *data;
 205         int ret, i;
 206         size_t num_clks;
 207         struct qcom_rpm *rpm;
 208         struct clk_rpm  **rpm_clks;
 209         const struct rpm_clk_desc *desc;
 210
 211         rpm = dev_get_drvdata(pdev->dev.parent);
 212         if (!rpm) {
 213                 dev_err(&pdev->dev, "Unable to retrieve handle to RPM\n");
 214                 return -ENODEV;
 215         }
 216
 217         desc = of_device_get_match_data(&pdev->dev);
 218         if (!desc)
 219                 return -EINVAL;
 220
 221         rpm_clks = desc->clks;
 222         num_clks = desc->num_clks;
 223
 224         rcc = devm_kzalloc(&pdev->dev, sizeof(*rcc) + sizeof(*clks) * num_clks,
 225                            GFP_KERNEL);
 226         if (!rcc)
 227                 return -ENOMEM;
 228
 229         clks = rcc->clks;
 230         data = &rcc->data;
 231         data->clks = clks;
 232         data->clk_num = num_clks;
 233
 234         for (i = 0; i < num_clks; i++) {
 235                 if (!rpm_clks[i]) {
 236                         clks[i] = ERR_PTR(-ENOENT);
 237                         continue;
 238                 }
 239
 240                 rpm_clks[i]->rpm = rpm;
 241                 clk = devm_clk_register(&pdev->dev, &rpm_clks[i]->hw);
 242                 if (IS_ERR(clk)) {
 243                         ret = PTR_ERR(clk);
 244                         goto err;
 245                 }
 246
 247                 clks[i] = clk;
 248         }
 249
 250         ret = of_clk_add_provider(pdev->dev.of_node, of_clk_src_onecell_get,
 251                                   data);
 252         if (ret)
 253                 goto err;
 254
 255         clk_prepare_enable(apq8064_afab_clk.hw.clk);
 256
 257         return 0;
 258
 259 err:
 260         dev_err(&pdev->dev, "Error registering RPM Clock driver (%d)\n", ret);
 261         return ret;
 262 }
 263
 264 static int rpm_clk_remove(struct platform_device *pdev)
 265 {
 266         of_clk_del_provider(pdev->dev.of_node);
 267         return 0;
 268 }
 269
 270 static struct platform_driver rpm_clk_driver = {
 271         .driver = {
 272                 .name = "qcom-clk-rpm",
 273                 .of_match_table = rpm_clk_match_table,
 274         },
 275         .probe = rpm_clk_probe,
 276         .remove = rpm_clk_remove,
 277 };
 278
 279 static int __init rpm_clk_init(void)
 280 {
 281         return platform_driver_register(&rpm_clk_driver);
 282 }
 283 core_initcall(rpm_clk_init);
 284
 285 static void __exit rpm_clk_exit(void)
 286 {
 287         platform_driver_unregister(&rpm_clk_driver);
 288 }
 289 module_exit(rpm_clk_exit);
 290
 291 MODULE_DESCRIPTION("Qualcomm RPM Clock Controller Driver");
 292 MODULE_LICENSE("GPL v2");
 293 MODULE_ALIAS("platform:qcom-clk-rpm");